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| 型號： | CLRC66301HN |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | Contactless reader IC |
| 封裝： | CLRC66301HN<SOT617-3 (HVQFN32)|<<http://www.nxp.com/packages/SOT617-3.html<1<Always Pb-free,;CLRC66301HN<SOT617-3 (HVQFN32)|<<http://www.nxp.com/packages/SOT617-3.html< |
| 文件頁數(shù)： | 18/100頁 |
| 文件大?。?/td> | 856K |
| 代理商： | CLRC66301HN |
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CLRC663
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Preliminary data sheet
COMPANY PUBLIC
Rev. 3.1 — 26 September 2011
171131
24 of 126
NXP Semiconductors
CLRC663
Contactless reader IC
9.5.3 IRQ0En_Reg register
interrupt Enable register for IRQ0_Reg.
9.5.4 IRQ1En_Reg register
interrupt Enable register for IRQ1_Reg.
Table 33:
IRQ0En_Reg register (address 08h); reset value: 10h
Bit
7
6
5
4
3
2
1
0
Symbol
Irq_Inv
Hi
AlertIrq
En
Lo
AlertIrq
En
IdleIrq
En
TxIrqEn
RxIrqEn
ErrIrqEn
RxSOF
Irq
En
Access
rights
r/w
Table 34:
Description of IRQ0En_Reg bits
Bit
Symbol
Description
7
Irq_Inv
Set to one the signal of the IRQ pin is inverted
6Hi
AlerIrqEn
Set to logic 1, it allows the High Alert interrupt request (indicated by the bit
HiAlertIrq) to be propagated to the GlobalIrq
5Lo
AlertIrqEn
Set to logic 1, it allows the Low Altert interrupt request (indicated by the bit
LoAlertIrq) to be propagated to the GlobalIrq
4
IdleIIrqEn
Set to logic 1, it allows the Idle interrupt request (indicated by the bit IdleIrq)
to be propagated to the GlobalIrq
3
TxIRqEn
Set to logic 1, it allows the transmitter interrupt request (indicated by the bit
TxtIrq) to be propagated to the GlobalIrq
2
RxIRqEn
Set to logic 1, it allows the receiver interrupt request (indicated by the bit
RxIrq) to be propagated to the GlobalIrq
1
ErrIRqEn
Set to logic 1, it allows the Error interrupt request (indicated by the bit
ErrorIrq) to be propagated to the GlobalIrq
0RxSOF
IrqEn
Set to logic 1, it allows the RxSOF interrupt request (indicated by the bit
RxSOFIrq) to be propagated to the GlobalIrq
Table 35:
IRQ1EN_Reg register (address 09h); reset value: 00h
Bit
7
6
5
4
3
2
1
0
Symbol
Irq
PushPull
IrqPin
En
LPCD_
IrqEn
Timer4
IRqEn
Timer3
IrqEn
Timer2
IrqEn
Timer1
IrqEn
Timer0
IrqEn
Access
rights
r/w
Table 36:
Description of IRQ1EN_Reg bits
Bit
Symbol
Description
7
IrqPushPull
Set to 1 the IRQ-pin acts as PushPull pin, otherwise it acts as
OpenDrain pin
6
IrqPinEN
Set to logic 1, it allows the global interrupt request (indicated by the bit
GlobalIrq) to be propagated to the interrupt pin
5
LPCD_IrqEN
Set to logic 1, it allows the LPCDinterrupt request (indicated by the bit
LPCDIrq) to be propagated to the GlobalIrq
4
Timer4IRqEn
Set to logic 1, it allows the timer4 interrupt request (indicated by the bit
timer4Irq) to be propagated to the GlobalIrq
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| CLRC66301HN,151 | 功能描述:射頻收發(fā)器 13.56MHz 5V HVQFN32 RoHS:否 制造商:Atmel 頻率范圍:2322 MHz to 2527 MHz 最大數(shù)據(jù)速率:2000 Kbps 調(diào)制格式:OQPSK 輸出功率:4 dBm 類型: 工作電源電壓:1.8 V to 3.6 V 最大工作溫度:+ 85 C 接口類型:SPI 封裝 / 箱體:QFN-32 封裝:Tray |
| CLRC66301HN,157 | 功能描述:射頻收發(fā)器 13.56MHz 5V HVQFN32 RoHS:否 制造商:Atmel 頻率范圍:2322 MHz to 2527 MHz 最大數(shù)據(jù)速率:2000 Kbps 調(diào)制格式:OQPSK 輸出功率:4 dBm 類型: 工作電源電壓:1.8 V to 3.6 V 最大工作溫度:+ 85 C 接口類型:SPI 封裝 / 箱體:QFN-32 封裝:Tray |
| CLRC66301HN,551 | 功能描述:射頻收發(fā)器 Contactless readr IC IC RoHS:否 制造商:Atmel 頻率范圍:2322 MHz to 2527 MHz 最大數(shù)據(jù)速率:2000 Kbps 調(diào)制格式:OQPSK 輸出功率:4 dBm 類型: 工作電源電壓:1.8 V to 3.6 V 最大工作溫度:+ 85 C 接口類型:SPI 封裝 / 箱體:QFN-32 封裝:Tray |
| CLRC66301HN,557 | 功能描述:射頻收發(fā)器 Contactless readr IC IC RoHS:否 制造商:Atmel 頻率范圍:2322 MHz to 2527 MHz 最大數(shù)據(jù)速率:2000 Kbps 調(diào)制格式:OQPSK 輸出功率:4 dBm 類型: 工作電源電壓:1.8 V to 3.6 V 最大工作溫度:+ 85 C 接口類型:SPI 封裝 / 箱體:QFN-32 封裝:Tray |
| CLRC66302HN,118 | 制造商:NXP Semiconductors 功能描述:CLRC66302HN/HVQFN32/REEL13// - Tape and Reel 制造商:NXP Semiconductors 功能描述:IC CONTACTLESS READER 32HVQFN |
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