Table 4. ELECTRICAL OPERATING CHARACTERISTICS (Note 7) Symbol Units Max Typ " />
參數(shù)資料
型號: CM2030-A0TR
廠商: ON Semiconductor
文件頁數(shù): 10/11頁
文件大?。?/td> 0K
描述: IC HDMI TX PORT P/I 38-TSSOP
標準包裝: 1
系列: *
類型: *
應(yīng)用: *
安裝類型: 表面貼裝
封裝/外殼: 38-TFSOP (0.173",4.40mm 寬)裸露焊盤
供應(yīng)商設(shè)備封裝: 38-TSSOP
包裝: 標準包裝
其它名稱: CM2030-A0TROSDKR
CM2030
http://onsemi.com
8
Table 4. ELECTRICAL OPERATING CHARACTERISTICS (Note 7)
Symbol
Units
Max
Typ
Min
Conditions
Parameter
CECRT
CEC Rise Time
Measured from 1090%
Assumes a signal swing from 03.3 V
26.4
250
ms
CECFT
CEC Fall Time
Measured from 9010%
Assumes a signal swing from 03.3 V
4
50
ms
VACC
Turn On Threshold of I2C / DDC Accelerator
Voltage is 0.3 ±10% X 5 V_Supply
(Note 8)
1.35
1.5
1.65
V
VON(DDC_OUT) Voltage Drop across DDC Level Shifter
LV_SUPPLY = 3.3 V, 3 mA Sink at
DDCIN, DDCOUT < VACC
150
225
mV
VOL(DDC_IN) Logic Level (ASIC side) when I2C / DDC Logic
Low Applied (I2C Passthrough Compatibility)
DDC_OUT = 0.4 V,
LV_SUPPLY = 3.3 V, 1.5 kW pullup on
DDC_OUT to 5.0 V (Note 8)
0.3
0.4
V
tr(DDC)
DDC_OUT Line Risetime,
VACC < VDDC_OUT < (5V_Supply 0.5 V)
DDC_IN floating, LV_SUPPLY = 3.3 V,
1.5 kW pullup on DDC_OUT to 5.0 V,
Bus Capacitance = 1500 pF
1
ms
VF
Diode Forward Voltage
Top Diode
Bottom Diode
IF = 8 mA, TA = 25°C
0.6
0.85
0.95
V
VESD
ESD Withstand Voltage (IEC)
Pins 4, 7, 10, 13, 20, 21, 22, 23, 24, 27,
30, 33, TA = 25°C (Note 8)
±8
kV
VESD
ESD Withstand Voltage (HBM)
Pins 1, 2, 16, 17, 18, 19, 37, 38,
TA = 25°C
±2
kV
VCL
Channel Clamp Voltage
Positive Transients
Negative Transients
TA = 25°C, IPP = 1 A, tP = 8/20 mS
(Note 11)
11.0
2.0
V
RDYN
Dynamic Resistance
Positive Transients
Negative Transients
TA = 25°C, IPP = 1 A, tP = 8/20 mS
Any I/O pin to Ground (Note 11)
1.4
0.9
W
ILEAK
TMDS Channel Leakage Current
TA = 25°C
0.01
1
mA
CIN, TMDS
TMDS Channel Input Capacitance
5V_SUPPLY = 5.0 V, Measured at
1 MHz, VBIAS = 2.5 V
0.9
1.2
pF
DCIN, TMDS TMDS Channel Input Capacitance Matching
5V_SUPPLY = 5.0 V, Measured at
1 MHz, VBIAS = 2.5 V (Note 10)
0.05
pF
CMUTUAL
Mutual Capacitance between Signal Pin and
Adja Cent Signal Pin
5V_SUPPLY = 0 V,
Measured at 1 MHz, VBIAS = 2.5 V
0.07
pF
CIN, DDCOUT Level Shifting Input Capacitance, Capacitance
to GND
5V_SUPPLY = 0 V,
Measured at 100 kHz, VBIAS = 2.5 V
10
pF
CIN, CECOUT Level Shifting Input Capacitance, Capacitance
to GND
5V_SUPPLY = 0 V,
Measured at 100 kHz, VBIAS = 1.65 V
10
pF
CIN, HPOUT Level Shifting Input Capacitance, Capacitance
to GND
5V_SUPPLY = 0 V,
Measured at 100 kHz, VBIAS = 2.5 V
10
pF
7. Operating Characteristics are over Standard Operating Conditions unless otherwise specified.
8. Standard IEC6100042, CDISCHARGE = 150 pF, RDISCHARGE = 330 W, 5V_SUPPLY = 5 V, 3.3V_SUPPLY = 3.3 V, LV_SUPPLY = 3.3
V, GND = 0 V.
9. Human Body Model per MILSTD883, Method 3015, CDISCHARGE = 100 pF, RDISCHARGE = 1.5 kW, 5V_SUPPLY = 5V, 3.3V_SUP-
PLY = 3.3 V, LV_SUPPLY = 3.3 V, GND = 0 V.
10.Intrapair matching, each TMDS pair (i.e. D+, D–)
11. These measurements performed with no external capacitor on VP (VP floating)
12.These static measurements do not include AC activity on controlled I/O lines.
13.This measurement does not inclue supply current for the 120 mA current source on the CEC pin.
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