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參數(shù)資料
| 型號(hào)： | CP2112EK |
| 廠商： | Silicon Laboratories Inc |
| 文件頁數(shù)： | 10/22頁 |
| 文件大?。?/td> | 0K |
| 描述： | KIT EVAL FOR CP2112 |
| 產(chǎn)品培訓(xùn)模塊： | CP21xx USB Bridge |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 主要目的： | 接口，USB 2.0 至 SMBus 電橋 |
| 嵌入式： | 否 |
| 已用 IC / 零件： | CP2112 |
| 主要屬性： | 全速（12Mbps） |
| 次要屬性： | LED 狀態(tài)指示器 |
| 已供物品： | 板，纜線，CD |
| 相關(guān)產(chǎn)品： | 336-2004-5-ND - IC HID USB-TO-SMBUS BRIDGE 24QFN |
| 其它名稱： | 336-2010 |
CP2112
18
Rev. 1.2
9. Voltage Regulator
The CP2112 includes an on-chip 5.0 to 3.45 V voltage regulator. This allows the CP2112 to be configured as either
a USB bus-powered device or a USB self-powered device. A typical connection diagram of the device in a bus-
powered application using the regulator is shown in Figure 10. When enabled, the voltage regulator output appears
on the VDD pin and can be used to power external devices. See Table 5 for the voltage regulator electrical
characteristics.
If the regulator is used to provide VDD in a self-powered application, use the same connections from Figure 10, but
connect REGIN to an onboard 5 V supply, and disconnect it from the VBUS pin. In addition, if REGIN may be un-
powered while VBUS is 5 V, a resistor divider shown in Note 5 of Figure 11 is required to meet the absolute
maximum voltage on VBUS specification in Table 1.
Figure 10. Typical Bus-Powered Connection Diagram
Note 2
Note 1
VBUS
D+
D-
GND
USB
Connector
Suspend
Signals
GPIO
Signals
CP2112
GPIO.0
GPIO.1
GPIO.2
GPIO.3
VPP
SUSPEND
GPIO.4
GPIO.5
GPIO.8
GPIO.6
GPIO.7
VBUS
D+
D-
RST
VIO
4.7 k
Note 4
Note 1 : Avalanche transient voltage suppression diodes compatible with Full-speed USB should be
added at the connector for ESD protection. Use Littelfuse p/n SP0503BAHT or equivalent.
Note 2 : An external pull-up is not required, but can be added for noise immunity.
Note 3 : VIO can be connected directly to VDD or to a supply as low as 1.8 V to set the I/O interface
voltage.
Note 4 : If programming the configuration ROM via USB, add a 4.7
F capacitor between VPP
and ground. During a programming operation, do not connect the VPP pin to other
circuitry, and ensure that VDD is at least 3.3 V.
4.7
F
Note 3
REGIN
VDD
GND
VIO
1
F
1-5
F
0.1
F
3.3 V Power
To
SMBus
Slave
Devices
SDA
SCL
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CP2112-F01-GM | 功能描述:輸入/輸出控制器接口集成電路 HID USB to SMBUS bridge RoHS:否 制造商:Silicon Labs 產(chǎn)品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray |
| CP2112-F01-GMR | 功能描述:輸入/輸出控制器接口集成電路 HID USB to SMBUS bridge RoHS:否 制造商:Silicon Labs 產(chǎn)品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray |
| CP2112-F02-FM | 制造商:Silicon Labs 功能描述:HID USB-to-SMBus Master,400kHz,OTP,QFN24 |
| CP2112-F02-GM | 功能描述:輸入/輸出控制器接口集成電路 HID USB to SMBUS Bridge RoHS:否 制造商:Silicon Labs 產(chǎn)品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray |
| CP2112-F02-GMR | 制造商:Silicon Laboratories Inc 功能描述:Single Chip HID USB to SMBus Master Bridge 24-Pin QFN EP 制造商:Silicon Laboratories Inc 功能描述:HID USB TO SMBUS BRIDGE - Tape and Reel 制造商:Silicon Laboratories Inc 功能描述:IC HID USB-TO-SMBUS BRIDGE 制造商:Silicon Laboratories Inc 功能描述:HID USB to SMBUS Bridge |
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