V
參數(shù)資料
型號: CP2112EK
廠商: Silicon Laboratories Inc
文件頁數(shù): 21/22頁
文件大小: 0K
描述: KIT EVAL FOR CP2112
產(chǎn)品培訓(xùn)模塊: CP21xx USB Bridge
標(biāo)準(zhǔn)包裝: 1
主要目的: 接口,USB 2.0 至 SMBus 電橋
嵌入式:
已用 IC / 零件: CP2112
主要屬性: 全速(12Mbps)
次要屬性: LED 狀態(tài)指示器
已供物品: 板,纜線,CD
相關(guān)產(chǎn)品: 336-2004-5-ND - IC HID USB-TO-SMBUS BRIDGE 24QFN
其它名稱: 336-2010
CP2112
8
Rev. 1.2
3. Pinout and Package Definitions
Table 7. CP2112 Pin Definitions
Name
Pin #
Type
Description
VDD
6
Power In
Power Out
Power Supply Voltage Input.
Voltage Regulator Output. See Section 9.
VIO
5
Power In I/O Supply Voltage Input.
GND
2
Ground. Must be tied to ground.
RST
9
D I/O
Device Reset. Open-drain output of internal POR or VDD monitor. An exter-
nal source can initiate a system reset by driving this pin low for the time
specified in Table 4.
REGIN
7
Power In 5 V Regulator Input. This pin is the input to the on-chip voltage regulator.
VBUS
8
D In
VBUS Sense Input. This pin should be connected to the VBUS signal of a
USB network.
VPP
16*
Special
Connect a 4.7 F capacitor between this pin and ground to support ROM
programming via the USB interface.
D+
3
D I/O
USB D+
D–
4
D I/O
USB D–
SCL
24
D I/O
Serial Clock signal for SMBus interface.
SDA
1
D I/O
Serial Data signal for SMBus interface.
GPIO.0
TXT
23*
D I/O
D Out
This pin is a user-configurable input or output.
In TXT mode, this pin is the Transmit Toggle pin and toggles to indicate
SMBus transmission. The pin is logic high when a transmission is not in
progress.
GPIO.1
RXT
22*
D I/O
D Out
This pin is a user-configurable input or output.
In RXT mode, this pin is the Receive Toggle pin and toggles to indicate
SMBus transmission. The pin is logic high when a transmission is not in
progress.
GPIO.2
21*
D I/O
This pin is a user-configurable input or output.
GPIO.3
20*
D I/O
This pin is a user-configurable input or output.
GPIO.4
15*
D I/O
This pin is a user-configurable input or output.
GPIO.5
14*
D I/O
This pin is a user-configurable input or output.
GPIO.6
13*
D I/O
This pin is a user-configurable input or output.
GPIO.7
CLK
12*
D I/O
D Out
This pin is a user-configurable input or output.
In CLK mode, this pin outputs a clock signal whose frequency is configu-
rable.
*Note: Pins can be left unconnected when not in use.
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