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參數(shù)資料
| 型號： | CP2112EK |
| 廠商： | Silicon Laboratories Inc |
| 文件頁數(shù)： | 11/22頁 |
| 文件大小： | 0K |
| 描述： | KIT EVAL FOR CP2112 |
| 產(chǎn)品培訓模塊： | CP21xx USB Bridge |
| 標準包裝： | 1 |
| 主要目的： | 接口，USB 2.0 至 SMBus 電橋 |
| 嵌入式： | 否 |
| 已用 IC / 零件： | CP2112 |
| 主要屬性： | 全速（12Mbps） |
| 次要屬性： | LED 狀態(tài)指示器 |
| 已供物品： | 板，纜線，CD |
| 相關產(chǎn)品： | 336-2004-5-ND - IC HID USB-TO-SMBUS BRIDGE 24QFN |
| 其它名稱： | 336-2010 |
CP2112
Rev. 1.2
19
Alternatively, if 3.0 to 3.6 V power is supplied to the VDD pin, the CP2112 can function as a USB self-powered
device with the voltage regulator bypassed. For this configuration, tie the REGIN input to VDD to bypass the voltage
regulator. A typical connection diagram showing the device in a self-powered application with the regulator
bypassed is shown in Figure 11.
The USB max power and power attributes descriptor must match the device power usage and configuration. See
the CP2112_SetIDs software included with the CP2112 Software Development Kit (SDK) for information on how to
customize USB descriptors for the CP2112.
Figure 11. Typical Self-Powered Connection Diagram (Regulator Bypass)
Note 3
Note 2
Note 1
VBUS
D+
D-
GND
USB
Connector
Suspend
Signals
GPIO
Signals
CP2112
GPIO.0
GPIO.1
GPIO.2
GPIO.3
VPP
SUSPEND
GPIO.4
GPIO.5
GPIO.8
GPIO.6
GPIO.7
VDD
REGIN
GND
VIO
VBUS
D+
D-
RST
0.1
F
1-5
F
VIO
4.7 k
Note 4
Note 1 : Avalanche transient voltage suppression diodes compatible with Full-speed USB should be
added at the connector for ESD protection. Use Littelfuse p/n SP0503BAHT or equivalent.
Note 2 : An external pull-up is not required, but can be added for noise immunity.
Note 3 : VIO can be connected directly to VDD or to a supply as low as 1.8 V to set the I/O interface
voltage.
Note 4 : If programming the configuration ROM via USB, add a 4.7
F capacitor between VPP
and ground. During a programming operation, do not connect the VPP pin to other
circuitry, and ensure that VDD is at least 3.3 V.
Note 5 : For self-powered systems where VDD and VIO may be unpowered when VBUS is connected
to 5 V, a resistor divider (or functionally-equivalent circuit) on VBUS is required to meet the
absolute maximum voltage on VBUS specification in the Electrical Characteristics section.
4.7
F
3.3 V
Power
To
SMBus
Slave
Devices
SDA
SCL
47 k
24 k
Note 5
(Optional)
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| CP2112-F01-GM | 功能描述:輸入/輸出控制器接口集成電路 HID USB to SMBUS bridge RoHS:否 制造商:Silicon Labs 產(chǎn)品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray |
| CP2112-F01-GMR | 功能描述:輸入/輸出控制器接口集成電路 HID USB to SMBUS bridge RoHS:否 制造商:Silicon Labs 產(chǎn)品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray |
| CP2112-F02-FM | 制造商:Silicon Labs 功能描述:HID USB-to-SMBus Master,400kHz,OTP,QFN24 |
| CP2112-F02-GM | 功能描述:輸入/輸出控制器接口集成電路 HID USB to SMBUS Bridge RoHS:否 制造商:Silicon Labs 產(chǎn)品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray |
| CP2112-F02-GMR | 制造商:Silicon Laboratories Inc 功能描述:Single Chip HID USB to SMBus Master Bridge 24-Pin QFN EP 制造商:Silicon Laboratories Inc 功能描述:HID USB TO SMBUS BRIDGE - Tape and Reel 制造商:Silicon Laboratories Inc 功能描述:IC HID USB-TO-SMBUS BRIDGE 制造商:Silicon Laboratories Inc 功能描述:HID USB to SMBUS Bridge |
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