DOCUMENT CHANGE L
參數(shù)資料
型號(hào): CP2201-GM
廠商: Silicon Laboratories Inc
文件頁(yè)數(shù): 9/108頁(yè)
文件大小: 0K
描述: IC ETH CTRLR SNGL-CHIP 28QFN
標(biāo)準(zhǔn)包裝: 73
控制器類(lèi)型: 以太網(wǎng)控制器,MAC/10Base-T
接口: 并行/串行
電源電壓: 3.1 V ~ 3.6 V
電流 - 電源: 75mA
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 28-VFQFN 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝: 28-QFN(5x5)
包裝: 管件
產(chǎn)品目錄頁(yè)面: 627 (CN2011-ZH PDF)
配用: 336-1326-ND - KIT REF DESIGN PWR OVER ETHERNET
336-1316-ND - KIT EVAL FOR CP2201 ETH CTRLR
其它名稱: 336-1313
CP2200/1
106
Rev. 1.0
DOCUMENT CHANGE LIST
Revision 0.4 to Revision 0.41
Connection Diagram (Multiplexed),” on page 7 for improved EMI emmissions and common mode stability.
Revision 0.41 to Revision 1.0
Added Maximum Supply Current specification in Table 2 on page 9.
Updated the maximum XTAL1 Input Low Voltage specification from 0.8 to 0.7 V (see Table 8 on page 20).
Updated the maximum RST Input Pullup Current specification from 40 to 50 A (see Table 13 on page 42).
Updated the Non-Multiplexed EMIF address hold time from 20 to 30 ns and the Tvd2 specification from 40 to
60 ns. Note that the Thold specification is unchanged from its value of 60 ns; therefore, changes to host timing
will not be required in most applications. See Section 16 on page 96.
Added a Revision-Specific Behavior chapter. See Section 17 on page 104.
Removed text indicating that all packets on the wire can be received and buffered by the CP220x.
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