參數(shù)資料
型號: CR16MCS9VJE7Y
英文描述: Microcontroller
中文描述: 微控制器
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代理商: CR16MCS9VJE7Y
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114
20.9.17 CAN Error Counter Register (CANEC)
The Can Error Counter Register contains the value of the
CAN Receive Error Counter and the CAN Transmit Error
Counter.
15
8
REC[7:0]
0
r
REC[7:0]
CAN Receive Error Counter. The bits REC[7:0]
holds the value of the receive error counter.
CAN Transmit Error Counter. The bits TEC[7:0]
holds the value of the transmit error counter.
TEC[7:0]
20.9.18 CAN Error Diagnostic Register (CEDIAG)
The CAN Error Diagnostic (CEDIAG) register provides infor-
mation about the last detected error. CR16CAN is able to
identify the field within the CAN frame format, in which the er-
ror occurred, and it identifies the bit number of the erroneous
bit within the according frame field. The CPU has read only
access and all bits will be cleared upon reset.
EFID[3:0]
Error Field Identifier. The EDIAG bits 3...0 iden-
tify the frame field in which the last error oc-
curred. How the various frame fields are coded
into the EFID bits is shown in Table 37.
Table 37
Error Field Identifier
EBID[5:0]
Error Bit Identifier. The EDIAG[9:4] bits contain
the number (position) of the incorrect bit within
the erroneous frame field. The bit number
starts with the value equal to the respective
frame field length minus one at the beginning of
each field and is decremented with each CAN
bit. Figure 71 shows an example on how the
EBID is calculated.
Assume the EFID resulted in 1110
2
and the EBID showed a
value of 111001
2
. This means that faulty field was the data
field. To calculate the bit position of the error, the DLC of the
message needs to be known. For example, for a DLC of 8
data bytes, the bit counter starts with the value: 8 x 8 - 1 = 63;
so when EBID[5:0] = 111001
2
= 57, then the bit number was
63 - 57 = 6.
The following bits provide an information of the error type.
TXE
Transmit Error. If set, this bit indicates that the
CR16CAN was an active transmitter at the time
the error occurred. If reset, the CR16CAN was
a receiver.
STUFF
Stuff Error. if set, this bit indicates that a the bit
stuffing rule was violated at the time the error
occurred. Note that certain bit fields do no use
bit stuffing and therefore this bit may be ignored
in those.
CRC
CRC Error. if set, this bit indicates that the CRC
is invalid. This bit should only be used if the
EFID shows the code of the ACK field.
MON
Monitor. This bit shows the bus value on the
CANRX pin as seen by the CR16CAN at the
time of the error.
DRIVE
Drive. This bit shows the output value on the
CANTX pin at the time of the error. Note that a
receiver will not drive the bus except during
ACK and during an active error flag.
Buffer 10
Buffer 11
Buffer 12
Buffer 13
Buffer 14
1
1
1
1
1
1
1
1
1
1
0
1
1
1
1
1
0
0
1
1
1
0
1
0
1
7
0
TEC[7:0]
15
14
13
12
11
10
9
4
3
EFID[3:0]
0
Reserved DRIVE MON CRC STUFF TXE
EBID[5:0]
0
r
Field
EFID3
EFID2
EFID1
EFID0
ERROR
ERROR DEL
ERROR ECHO
BUS IDLE
ACK
EOF
INTERMISSION
SUSPEND
TRANSMISSION
SOF
ARBITRATION
0
0
0
0
0
0
0
0
0
0
0
1
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
0
1
1
1
1
1
0
0
0
0
0
1
Table 36
Highest Priority Interrupt Code
(CICEN = FFFF)
CAN interrupt
request
IRQ
IST3
IST2
IST1
IST0
IDE
1
0
1
0
EXTENDED
ARBITRATION
R1/R0
DLC
DATA
CRC
1
0
1
1
1
1
1
1
1
1
1
1
0
0
1
1
0
1
0
1
Table 37
Error Field Identifier
Field
EFID3
EFID2
EFID1
EFID0
r
r
r
r
r
r
incorrect
bit
data field
Figure 71.
EBID Example
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