參數(shù)資料
型號： CS42L52-DNZR
廠商： CIRRUS LOGIC INC
元件分類： 消費家電
中文描述： SPECIALTY CONSUMER CIRCUIT, QCC40
封裝： 6 X 6 MM, LEAD FREE, MO-220, QFN-40
文件頁數(shù)： 44/59頁
文件大小： 1800K
代理商： CS42L52-DNZR
DS680F1
49
CS42L52
5/13/08
6.8.2
PGA Input Mapping
Selects one or sums/mixes the analog input signal into the PGA. Each bit of the PGAx_SEL[5:1] word
corresponds to individual channels (i.e. PGAx_SEL1 selects AIN1x, PGAx_SEL2 selects AIN2x, etc.).
6.9
Analog & HPF Control (Address 0Ah)
6.9.1
ADCx High-Pass Filter
Configures the internal high-pass filter after ADCx.
6.9.2
ADCx High-Pass Filter Freeze
Configures the high pass filter’s digital DC subtraction and/or calibration after ADCx.
6.9.3
Ch. x Analog Soft Ramp
Configures an incremental volume ramp from the current level to the new level at the specified rate.
6.9.4
Ch. x Analog Zero Cross
Configures when the signal level changes occur for the analog volume controls.
Note:
If the signal does not encounter a zero crossing, the requested volume change will occur after a
timeout period of 1024 sample periods (approximately 10.7 ms at 48 kHz sample rate).
PGAxSEL[5:1]
Selected Input to PGAx
(Examples)
00000
No inputs selected
00001
AIN1x
00010
AIN2x
00100
AIN3x
01000
AIN4x
10000
MICx;
for single-ended MIC inputs, use MICxSEL (“MIC x Select” on page 55) to select MIC 1 or MIC 2; for
differential MIC inputs, enable MICxCFG (“MICx Configuration” on page 55)
10001
MICx + AIN1x
10011
MICx + AIN1x + AIN2x
Application:
Note: Table does not show all possible combinations.
7
6
5
432
10
HPFB
HPFRZB
HPFA
HPFRZA
ANLGSFTB
ANLGZCB
ANLGSFTA
ANLGZCA
HPFx
High Pass Filter Status
0
Disabled
1
Enabled
HPFRZx
High Pass Filter Digital Subtraction
0
Continuous DC Subtraction
1
Frozen DC Subtraction
ANLGSFTx
Volume Changes
Affected Analog Volume Controls
0
Do not occur with a soft ramp
MICxGAIN[4:0] (“MICx Gain” on page 55), PGAxVOL[5:0] (“PGAx Volume”
1
Occur with a soft ramp
Ramp Rate:
1/2 dB every 16 LRCK cycles
ANLGZCx
Volume Changes
Affected Analog Volume Controls
0
Do not occur on a zero cross-
ing
MICxGAIN[4:0] (“MICx Gain” on page 55), PGAxVOL[5:0] (“PGAx Volume”
1
Occur on a zero crossing
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