參數(shù)資料
型號: CS5373A-ISZR
廠商: Cirrus Logic Inc
文件頁數(shù): 14/40頁
文件大?。?/td> 0K
描述: IC DAC/MODULATOR LP/HP 28-SSOP
標(biāo)準(zhǔn)包裝: 1,000
類型: 調(diào)制器
分辨率(位): 24 b
采樣率(每秒): 512k
電壓電源: 模擬和數(shù)字,雙 ±
電源電壓: ± 2.5V,3.3V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 28-SSOP(0.209",5.30mm 寬)
供應(yīng)商設(shè)備封裝: 28-SSOP
包裝: 帶卷 (TR)
配用: CDB5378-ND - EVALUATION BOARD FOR CS5378
CS5373A
DS703F2
21
4. POWER MODES
The CS5373A has five power modes. Modula-
tor mode, AC test modes, and DC test modes
are operational modes, while power down and
sleep mode are non-operational standby
modes.
4.1 Power Down
If MCLK is stopped, an internal loss-of-clock
detection circuit automatically places the
CS5373A into power down. Power down is in-
dependent of the MODE and ATT pin settings,
and is automatically invoked after approxi-
mately 40 s without an incoming MCLK edge.
In power down the modulator, AC test circuitry
and DC test circuitry are inactive and all out-
puts are high impedance. When used with the
CS5378 digital filter, the CS5373A is in power
down immediately after reset since MCLK is
disabled by default.
4.2 Sleep Mode
With MCLK active, selecting sleep mode
(MODE 7) places the CS5373A into a micro-
power sleep state. In sleep mode the modula-
tor, AC test circuitry and DC test circuitry are
inactive and all outputs are high impedance.
4.3 Modulator Mode
With MCLK active, selecting modulator mode
(MODE 0) enables the CS5373A modulator
and places the AC and DC test circuitry into a
micro-power sleep state with the analog test
outputs high impedance. Following completion
of AC and DC system self-tests, the CS5373A
is typically set into modulator mode for normal
data acquisition.
4.4 AC Test Modes
With MCLK and TDATA active, selecting an
AC test mode (MODE 1, 2, 3, 6) enables the
modulator and causes the DAC to output AC
waveforms on the analog test outputs. AC test
modes use the low-power
ΔΣ DAC circuitry in
the CS5373A to create precision differential or
common mode analog AC output signals from
the encoded digital test bit stream (TBS) input.
4.5 DC Test Modes
With MCLK active, selecting a DC test mode
(MODE 4, 5) enables the modulator and
causes the DAC to generate precision DC volt-
ages on the analog test outputs. DC test
modes use switch-capacitor level-shifting buf-
fer circuitry in the CS5373A to create differen-
tial or common mode DC analog output
voltages from the voltage reference input.
POWER DOWN
MCLK = OFF
MODE = XXX
SLEEP MODE
MCLK = ON
MODE = 7
AC TEST MODES
MCLK = ON
MODE = 1, 2, 3, 6
DC TEST MODES
MCLK = ON
MODE = 4, 5
MODULATOR MODE
MCLK = ON
MODE = 0
Figure 9. Power Mode Diagram
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