參數(shù)資料
型號: CXD2470R
廠商: Sony Corporation
英文描述: Timing Generator for Frame Readout CCD Image Sensor
中文描述: 時序發(fā)生器傳感器讀出CCD圖像幀
文件頁數(shù): 18/38頁
文件大小: 405K
代理商: CXD2470R
– 18 –
CXD2470R
Control data: D36 to D37 LDAD [ADCLK logic phase adjustment]
This indicates the ADCLK logic phase adjustment data. The default is 90° relative to MCKO.
Control data: D38 to D39 STB [Standby]
The operating mode is switched as follows. However, the standby bits are loaded to the CXD2470R and
control is applied immediately at the rising edge of SEN.
D37
0
0
1
1
D36
0
1
0
1
Degree of adjustment (°)
0
90
180
270
D39
X
0
1
D38
0
1
1
Symbol
CAM
SLP
STB
Operating mode
Normal operating mode
Sleep mode
Standby mode
See the Pin Status Table for the pin status in each mode.
Control data: D12 CCD [CCD switching]
Specifies CCD image sensor to be used. However, the CCD image sensor switching bit is loaded to the
CXD2470R and reflected at the falling edge of VDI. The default is "ICX224/ICX284".
D12
0
1
CCD
ICX224/ICX284
ICX202/ICX232
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相關代理商/技術參數(shù)
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