參數(shù)資料
型號(hào): CXD2498R
廠(chǎng)商: Sony Corporation
英文描述: Timing Generator for Frame Readout CCD Image Sensor
中文描述: 時(shí)序發(fā)生器傳感器讀出CCD圖像幀
文件頁(yè)數(shù): 10/51頁(yè)
文件大小: 554K
代理商: CXD2498R
10
CXD2498R
AC Characteristics
AC characteristics between the serial interface clocks
Serial interface clock internal loading characteristics (1)
Symbol
t
s1
t
h1
Definition
Min.
Typ.
Max.
Unit
SEN setup time, activated by the falling edge of HD
SEN hold time, activated by the falling edge of HD
0
134
ns
μs
(Within the recommended operating conditions)
Symbol
t
s1
t
h1
t
s2
t
s3
Definition
Min.
20
Typ.
Max.
Unit
ns
SSI setup time, activated by the rising edge of SCK
SSI hold time, activated by the rising edge of SCK
SCK setup time, activated by the rising edge of SEN
SEN setup time, activated by the rising edge of SCK
20
20
20
ns
ns
ns
(Within the recommended operating conditions)
Restriction in draft mode with an operating frequency of 22.5MHz.
SSI
0.2V
DD
c
0.2V
DD
c
0.8V
DD
c
ts2
th1
ts1
ts3
0.8V
DD
c
0.8V
DD
c
SCK
SEN
SEN
th1
Enlarged view
Example: During frame mode
0.2V
DD
c
ts1
0.2V
DD
c
V1A
VD
HD
HD
V1A
SEN
0.8V
DD
c
Be sure to maintain a constantly high SEN logic level near the falling edge of the HD in the horizontal period
during which V1A/B/C and V3A/B/C values take the ternary value and during that horizontal period.
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