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參數(shù)資料
| 型號： | CXD2498R |
| 廠商： | Sony Corporation |
| 英文描述： | Timing Generator for Frame Readout CCD Image Sensor |
| 中文描述： | 時序發(fā)生器傳感器讀出CCD圖像幀 |
| 文件頁數(shù)： | 11/51頁 |
| 文件大小： | 554K |
| 代理商： | CXD2498R |
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11
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CXD2498R
Serial interface clock internal loading characteristics (2)
Symbol
t
s1
t
h1
Definition
Min.
0
Typ.
Max.
Unit
ns
SEN setup time, activated by the falling edge of VD
SEN hold time, activated by the falling edge of VD
200
ns
(Within the recommended operating conditions)
Restriction with an operating frequency of 22.5MHz.
th1
Enlarged view
0.2V
DD
c
ts1
0.2V
DD
c
VD
HD
VD
HD
SEN
0.8V
DD
c
Example: During frame mode
Be sure to maintain a constantly high SEN logic level near the falling edge of VD.
Serial interface clock output variation characteristics
Normally, the serial interface data is loaded to the CXD2498R at the timing shown in
“
Serial interface clock
internal loading characteristics (1)
”
above. However, one exception to this is when the data such as STB is
loaded to the CXD2498R and controlled at the rising edge of SEN. See
”
Description of Operation
”
.
0.8V
DD
c
SEN
Output signal
tpdPULSE
Symbol
t
pdPULSE
Definition
Min.
Typ.
Max.
Uniy
Output signal delay, activated by the rising edge of SEN
5
ns
(Within the recommended operating conditions)
70
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相關代理商/技術參數(shù) |
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| CXD2500AQ | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:CD DIGITAL SIGNAL PROCESSOR |
| CXD2500AQZ | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:CD DIGITAL SIGNAL PROCESSOR |
| CXD2500BQ | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:CD Digital Signal Processor |
| CXD2507AQ | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:CD Digital Signal Processor |
| CXD2508AQ | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:CD Digital Signal Processor |
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