
– 37 –
CXD2510Q
§3-5. Digital Out
There are three digital out formats: the type 1 format for broadcasting stations, the type 2 form 1 format for
home use, and the type 2 form 2 format for the manufacture of software.
The CXD2510Q supports type 2 form 1.
In addition, regarding the clock accuracy of the channel status, level
III
is set automatically when the crystal
clock is used and level
II
is variable pitch. In addition, Sub Q data which are matched twice in succession
after a CRC check are input to the first four bits (bit 0 to 3).
DOUT is output when the crystal is 34MHz, the variable pitch is reset, and DSPB = 1. Therefore, set MD2 to
0 and turn DOUT off.
bit 0 to 3 -Sub Q control bits that matched twice with CRCOK
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0/1
0
0
0
ID0
ID1 COPY Emph
0
0
0
0
1
0
0
0
0
0
0
0
From sub Q
0
16
32
48
176
– Sub Q control bits that matched twice with CRCOK
Digital Out C bit
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
– Varipitch: 1
X'Tal: 0
bit 0 to 3
bit29
Table 3-6.
§3-6. Servo Auto Sequence
This function performs a series of controls, including auto focus and track jumps. When the auto sequence
command is received from the CPU, auto focus, 1 track jump, 2N track jumps, and fine search are executed
automatically.
SSP (servo signal processor LSI) is used in an exclusive manner during the auto sequence execution (when
XBUSY = low), so that commands from the CPU are not transferred to the SSP, but can be sent to the
CXD2510Q.
In addition, when using the auto sequence, connect the CPU, RF and SSP as shown in Fig. 3-7, and turn the
A.SEQ of register 9 on.
When CLOK goes from low to high while XBUSY is low, XBUSY does not become high for a maximum of
100μs after that point. This is designed to prevent the transfer of erroneous data to the SSP when XBUSY
changes from low to high by the monostable multivibrator, which is reset by CLOK being low (when XBUSY
is low).