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參數(shù)資料
| 型號： | CY28346ZXC |
| 廠商： | Silicon Laboratories Inc |
| 文件頁數(shù)： | 16/19頁 |
| 文件大小： | 0K |
| 描述： | IC CLOCK DIFF OUT CK408 56TSSOP |
| 標準包裝： | 35 |
| 類型： | * |
| PLL： | 是 |
| 輸入： | 晶體 |
| 輸出： | 時鐘 |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:19 |
| 差分 - 輸入:輸出： | 無/是 |
| 頻率 - 最大： | 200MHz |
| 除法器/乘法器： | 是/無 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | * |
| 封裝/外殼： | * |
| 供應(yīng)商設(shè)備封裝： | * |
| 包裝： | * |
| 其它名稱： | SLCY28346ZXC |
CY28346
........................Document #: 38-07331 Rev. *C Page 6 of 19
Dial-a-Frequency Features
SMBus Dial-a-Frequency feature is available in this device via
Byte8 and Byte9.
P is a large-value PLL constant that depends on the frequency
selection achieved through the hardware selectors (S1, S0). P
value may be determined from Table 2.
Dial-a-dB Features
SMBus Dial-a-dB feature is available in this device via Byte8
and Byte9.
Spread Spectrum Clock Generation (SSCG)
Spread Spectrum is a modulation technique used to
minimizing EMI radiation generated by repetitive digital
signals. A clock presents the greatest EMI energy at the center
frequency it is generating. Spread Spectrum distributes this
energy over a specific and controlled frequency bandwidth
therefore causing the average energy at any one point in this
band to decrease in value. This technique is achieved by
modulating the clock away from its resting frequency by a
certain percentage (which also determines the amount of EMI
reduction). In this device, Spread Spectrum is enabled by
setting specific register bits in the SMBus control bytes.
Table 3 is a listing of the modes and percentages of Spread
Spectrum modulation that this device incorporates.
Test and Measurement Set-up
For Differential CPU Output Signals
The following diagram shows lumped test load configurations
for the differential Host Clock Outputs.
Table 2. P Value
S(1:0)
P
0 0
32005333
0 1
48008000
1 0
96016000
1 1
64010667
Table 3. Spread Spectrum
SS2
SS1
SS0
Spread Mode
Spread%
0
Down
+0.00, –0.25
0
1
Down
+0.00, –0.50
0
1
0
Down
+0.00, –0.75
0
1
Down
+0.00, –1.00
1
0
Center
+0.13, –0.13
1
0
1
Center
+0.25, –0.25
1
0
Center
+0.37, –0.37
1
Center
+0.50, –1.50
M eas urem en t P oint
2p F
CP U T
M U L T SEL
T
PCB
T
PCB
CP U C
M easurem ent P o int
2p F
Figure 1. 1.0V Test Load Termination
CPUT
MULTSEL
T
PCB
T
PCB
CPUC
Measurement Point
2pF
Measurement Point
2pF
VDD
Figure 2. 0.7V Test Load Termination
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參數(shù)描述 |
|---|---|
| CY28346ZXC-2 | 功能描述:時鐘合成器/抖動清除器 NB Clk Intel Brkdale 830M & 845 chipsets RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| CY28346ZXC-2T | 功能描述:時鐘合成器/抖動清除器 NB Clk Intel Brkdale 830M & 845 chipsets RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| CY28346ZXCT | 功能描述:時鐘合成器/抖動清除器 NB Clk Intel Brkdale 830M & 845 chipsets RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
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| CY28347OC | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Universal Single-chip Clock Solution for VIA P4M266/KM266 DDR Systems |
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