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參數(shù)資料
| 型號： | CY7C1024AV33-9AC |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | SRAM |
| 英文描述： | 128K X 24 STANDARD SRAM, 9 ns, PQFP100 |
| 封裝： | 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100 |
| 文件頁數(shù)： | 1/10頁 |
| 文件大?。?/td> | 206K |
| 代理商： | CY7C1024AV33-9AC |
ADVANCE INFORMATION
128K x 24 Static RAM
CY7C1024AV33
Cypress Semiconductor Corporation
3901 North First Street
San Jose
CA 95134
408-943-2600
May 1, 2000
33
Features
High speed
—tAA = 9 ns
CMOS for optimum speed/power
Center power/ground pinout
Automatic power-down when deselected
Easy memory expansion with CE1, CE2, CE3 and OE
options
Functional Description
The CY7C1024AV33 is a high-performance CMOS static RAM
organized as 131,072 words by 24 bits. Easy memory expan-
sion is provided by an active LOW CE1, CE3, active HIGH
CE2, an active LOW Output Enable (OE), and three-state driv-
ers. This device has an automatic power-down feature that
significantly reduces power consumption when deselected.
Writing to the device is accomplished by taking Chip Enable
(CE1, CE2, CE3) active and Write Enable (WE) inputs LOW.
Data on the 24 I/O pins (I/O0 through I/O23) is then written into
the location specified on the address pins (A0 through A16).
Reading from the device is accomplished by taking Chip
Enable (CE1, CE2, CE3) active and Output Enable (OE) LOW
while forcing Write Enable (WE) HIGH. Under these condi-
tions, the contents of the memory location specified by the
address pins will appear on the I/O pins.
The 24 input/output pins (I/O0 through I/O23) are placed in a
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), or during a write
operation (CE1, CE3 LOW, CE2 HIGH, and WE LOW).
The CY7C1024AV33 is available in a standard 119-ball BGA
package and a 100-pin TQFP package.
Functional Block Diagram
CE#
ADDRESS
BUFFER
ROW
DECODER
COLUMN DECODER
MEMORY ARRAY
128K X 24
I/O
BUFFER
DQ0
CONTROL
A16
A0
DQ23
V
CC
V
SS
CE1#
CE2
BE0#
BE1#
BE2#
WE#
OE#
Selection Guide
7C1024AV33-9
7C1024AV33-10
7C1024AV33-12
7C1024AV33-15
Maximum Access Time (ns)
9
10
12
15
Maximum Operating Current (mA)
300
275
250
225
Maximum Standby Current (mA)
15
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C1024DV33-10BGXI | 功能描述:靜態(tài)隨機存取存儲器 3-Mbit (128K x 24) 靜態(tài)隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C1024DV33-10BGXIT | 功能描述:靜態(tài)隨機存取存儲器 3-Mbit (128K x 24) 靜態(tài)隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C102D10ZC | 制造商:CYPRESS 功能描述:New |
| CY7C1031-10JC | 制造商:Cypress Semiconductor 功能描述:SRAM Chip Sync Single 5V 1.125M-Bit 64K x 18 10ns 52-Pin PLCC 制造商:Rochester Electronics LLC 功能描述:1MB (64KX18) SYNCH RAM PENTIUM BURST - Bulk |
| CY7C1031-12JCT | 制造商:Cypress Semiconductor 功能描述:SRAM Chip Sync Single 5V 1.125M-Bit 64K x 18 12ns 52-Pin PLCC T/R |
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