- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄358698 > CY7C1362B-225BZI (CYPRESS SEMICONDUCTOR CORP) 9-Mbit (256K x 36/512K x 18) Pipelined SRAM PDF資料下載
參數(shù)資料
| 型號： | CY7C1362B-225BZI |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | 9-Mbit (256K x 36/512K x 18) Pipelined SRAM |
| 中文描述： | 512K X 18 CACHE SRAM, 2.8 ns, PBGA165 |
| 封裝： | 13 X 15 MM, 1.20 MM HEIGHT, FBGA-165 |
| 文件頁數(shù)： | 10/34頁 |
| 文件大小： | 895K |
| 代理商： | CY7C1362B-225BZI |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁當(dāng)前第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁
CY7C1360B
CY7C1362B
Document #: 38-05291 Rev. *C
Page 10 of 34
ADSP
84
84
A4
B9
Input-
Synchronous
Address Strobe from Processor, sampled on
the rising edge of CLK, active LOW
. When
asserted LOW, addresses presented to the device
are captured in the address registers. A
1
, A
0
are
also loaded into the burst counter. When ADSP
and ADSC are both asserted, only ADSP is recog-
nized. ASDP is ignored when CE
1
is deasserted
HIGH.
ADSC
85
85
P4
A8
Input-
Synchronous
Address Strobe from Controller, sampled on
the rising edge of CLK, active LOW
. When
asserted LOW, addresses presented to the device
are captured in the address registers. A
1
, A
0
are
also loaded into the burst counter. When ADSP
and ADSC are both asserted, only ADSP is recog-
nized.
ZZ
64
64
T7
H11
Input-
Asynchronous
ZZ “Sleep” Input, active HIGH
. When asserted
HIGH places the device in a non-time-critical
“sleep” condition with data integrity preserved. For
normal operation, this pin has to be LOW or left
floating. ZZ pin has an internal pull-down.
DQs,
DQPs
58,59,62,
63,68,69,
72,73,8,9,
12,13,18,
19,22,23,
74,24
58,59,62,
63,68,69,
72,73,8,9,
12,13,18,
19,22,23,
74,24
P7,K7,
G7,E7,
F6,H6,L6,
N6,D1,
H1,L1,
N1,E2,
G2,K2,
M2,D6,
P2
J10,K10,
L10,M10,
D11,E11,
F11,G11,J1,
K1,L1,M1,D
2,E2,F2,
G2,C11,N1
I/O-
Synchronous
Bidirectional Data I/O lines
. As inputs, they feed
into an on-chip data register that is triggered by the
rising edge of CLK. As outputs, they deliver the
data contained in the memory location specified by
the addresses presented during the previous clock
rise of the a Read cycle. The direction of the pins
is controlled by OE. When OE is asserted LOW,
the pins behave as outputs. When HIGH, DQs and
DQP
X
are placed in a three-state condition.
Power Supply
Power supply inputs to the core of the device
.
V
DD
15,41,65,
91
15,41,65,
91
C4,J2,J4,
J6,R4
D4,D8,E4,E
8,F4,F8,
G4,G8,H4,
H8,J4,J8,
K4,K8,L4,
L8,M4,M8
V
SS
17,40,67,
90
17,40,67,
90
D3,D5,
E5,E3,F3,
F5,G5,
H3,H5,
K3,K5,L3,
M3,M5,
N3,N5,
P3,P5
H2,C4,C5,
C6,C7,C8,
D5,D6,D7,E
5,E6,E7,
F5,F6,F7,
G5,G6,G7,
H5,H6,H7,J
5,J6,J7,
K5,K6,K7,
L5,L6,L7,
M5,M6,M7,
N4,N8
Ground
Ground for the core of the device
.
V
SSQ
5,10,21,26,
55,60,71,
76
5,10,21,26,
55,60,71,
76
-
-
I/O Ground
Ground for the I/O circuitry
.
CY7C1362B–Pin Definitions
(continued)
Name
TQFP
3-Chip
Enable
TQFP
2-Chip
Enable
BGA
fBGA
I/O
Description
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY7C1362B-200BZI | 9-Mbit (256K x 36/512K x 18) Pipelined SRAM |
| CY7C1362B-200BZC | 9-Mbit (256K x 36/512K x 18) Pipelined SRAM |
| CY7C1362B-200BGI | 9-Mbit (256K x 36/512K x 18) Pipelined SRAM |
| CY7C1362B-225AJC | BACKSHELL, MDR, 50WAY, METAL; For use with:Mini D Ribbon 101XX-6000 EC Plug Connectors; Material:Aluminum; Colour:Nickel; Connector type:Backshell; Ways, No. of:50 RoHS Compliant: Yes |
| CY7C1362B-225AI | Plastic Connector Backshell; Connector Shell Size:Black; Enclosure Material:Polyester; Enclosure Color:Black; Features:For: 0.050" D-Miniature D Ribbon Connectors; Leaded Process Compatible:No; No. of Positions:50 RoHS Compliant: No |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C1362C-166AJXC | 功能描述:靜態(tài)隨機存取存儲器 512Kx18 3.3V COM Sync PL 1CD 靜態(tài)隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C1362C-166AJXCT | 功能描述:IC SRAM 9MBIT 166MHZ 100LQFP RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 格式 - 存儲器:RAM 存儲器類型:移動 SDRAM 存儲容量:256M（8Mx32） 速度:133MHz 接口:并聯(lián) 電源電壓:1.7 V ~ 1.95 V 工作溫度:-40°C ~ 85°C 封裝/外殼:90-VFBGA 供應(yīng)商設(shè)備封裝:90-VFBGA（8x13） 包裝:帶卷 (TR) 其它名稱:557-1327-2 |
| CY7C1362C-166AXC | 制造商:Cypress Semiconductor 功能描述:SRAM Chip Sync Dual 3.3V 9M-Bit 512K x 18 3.5ns 100-Pin TQFP |
| CY7C1362C-166BZC | 制造商:Rochester Electronics LLC 功能描述: 制造商:Cypress Semiconductor 功能描述: |
| CY7C1362C-200AJXC | 功能描述:靜態(tài)隨機存取存儲器 512Kx18 3.3V COM Sync PL 1CD 靜態(tài)隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。