參數(shù)資料
型號: CY7C1371BV25-83BGC
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: SRAM
英文描述: 512K X 36 ZBT SRAM, 10 ns, PBGA119
封裝: 14 X 22 MM, 2.40 MM HEIGHT, PLASTIC, BGA-119
文件頁數(shù): 6/25頁
文件大?。?/td> 709K
代理商: CY7C1371BV25-83BGC
CY7C1373BV25
CY7C1371BV25
Document #: 38-05250 Rev. *A
Page 14 of 25
Identification Register Definitions
Instruction Field
512K x 36
1M x 18
Description
Revision Number
(31:28)
xxxx
Reserved for version number.
Device Depth
(27:23)
00111
01000
Defines depth of SRAM. 512K or 1M
Device Width
(22:18)
00100
00011
Defines with of the SRAM. x36 or x18
Cypress Device ID
(17:12)
xxxxx
Reserved for future use.
Cypress JEDEC ID
(11:1)
00011100100
Allows unique identification of SRAM vendor.
ID Register Presence
(0)
1
Indicate the presence of an ID register.
Scan Register Sizes
Register Name
Bit Size (x18)
Bit Size (x36)
Instruction
3
Bypass
1
ID
32
Boundary Scan
51
70
Identification Codes
Instruction
Code
Description
EXTEST
000
Captures the Input/Output ring contents. Places the boundary scan register
between the TDI and TDO. Forces all SRAM outputs to High-Z state. This
instruction is not 1149.1 compliant.
IDCODE
001
Loads the ID register with the vendor ID code and places the register
between TDI and TDO. This operation does not affect SRAM operation.
SAMPLE Z
010
Captures the Input/Output contents. Places the boundary scan register
between TDI and TDO. Forces all SRAM output drivers to a High-Z state.
RESERVED
011
Do Not Use: This instruction is reserved for future use.
SAMPLE/PRELOAD
100
Captures the Input/Output ring contents. Places the boundary scan register
between TDI and TDO. Does not affect the SRAM operation. This instruction
does not implement 1149.1 preload function and is therefore not 1149.1
compliant.
RESERVED
101
Do Not Use: This instruction is reserved for future use.
RESERVED
110
Do Not Use: This instruction is reserved for future use.
BYPASS
111
Places the bypass register between TDI and TDO. This operation does not
affect SRAM operation.
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