參數(shù)資料
型號(hào)： CY7C2561KV18-450BZC
廠商： CYPRESS SEMICONDUCTOR CORP
元件分類： SRAM
英文描述： 8M X 8 QDR SRAM, 0.37 ns, PBGA165
封裝： 15 X 13 MM, 1.4 MM HEIGHT, FBGA-165
文件頁(yè)數(shù)： 4/29頁(yè)
文件大小： 839K
代理商： CY7C2561KV18-450BZC
PRELIMINARY
CY7C2561KV18, CY7C2576KV18
CY7C2563KV18, CY7C2565KV18
Document Number: 001-15887 Rev. *E
Page 12 of 29
Table 6. Write Cycle Descriptions
The write cycle description table for CY7C2565KV18 follows. [4, 12]
BWS0 BWS1 BWS2 BWS3
K
Comments
LLLL
L–H
–
During the data portion of a write sequence, all four bytes (D[35:0]) are written into
the device.
LLLL
–
L–H During the data portion of a write sequence, all four bytes (D[35:0]) are written into
the device.
L
H
L–H
–
During the data portion of a write sequence, only the lower byte (D[8:0]) is written
into the device. D[35:9] remains unaltered.
L
H
–
L–H During the data portion of a write sequence, only the lower byte (D[8:0]) is written
into the device. D[35:9] remains unaltered.
H
L
H
L–H
–
During the data portion of a write sequence, only the byte (D[17:9]) is written into
the device. D[8:0] and D[35:18] remains unaltered.
H
L
H
–
L–H During the data portion of a write sequence, only the byte (D[17:9]) is written into
the device. D[8:0] and D[35:18] remains unaltered.
H
L
H
L–H
–
During the data portion of a write sequence, only the byte (D[26:18]) is written into
the device. D[17:0] and D[35:27] remains unaltered.
H
L
H
–
L–H During the data portion of a write sequence, only the byte (D[26:18]) is written into
the device. D[17:0] and D[35:27] remains unaltered.
H
L
L–H
–
During the data portion of a write sequence, only the byte (D[35:27]) is written into
the device. D[26:0] remains unaltered.
H
L
–
L–H During the data portion of a write sequence, only the byte (D[35:27]) is written into
the device. D[26:0] remains unaltered.
HHHH
L–H
–
No data is written into the device during this portion of a write operation.
HHHH
–
L–H No data is written into the device during this portion of a write operation.
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