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參數(shù)資料
| 型號： | CYD18S72AV-133BBI |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | SRAM |
| 英文描述： | 256K X 72 DUAL-PORT SRAM, 5.5 ns, PBGA484 |
| 封裝： | 23 X 23 MM, 1.60 MM HEIGHT, 1 MM PITCH, FBGA-484 |
| 文件頁數(shù)： | 18/25頁 |
| 文件大小： | 628K |
| 代理商： | CYD18S72AV-133BBI |
CYD04S72V
CYD09S72V
CYD18S72AV
Document #: 38-06069 Rev. *H
Page 25 of 25
Document History Page
Document Title: FLEx72 3.3V 64K/128K/256K x 72 Synchronous Dual-Port RAM
Document Number: 38-06069
REV.
ECN NO.
Issue Date
Orig. of
Change
Description of Change
**
125859
06/17/03
SPN
New Data Sheet
*A
128707
08/01/03
SPN
Added -133 speed bin
Updated spec values for ICC, tHA, tHB, tHW, tHD
Added new parameter ICC1
Added bank select read and read to write to read (OE=low) timing diagrams
*B
128997
09/18/03
SPN
Updated spec values for tOE, tOHZ, tCH2, tCL2, tHA, tHB, tHW, tHD, ICC, ISB5, tSA,
tSB,tSW,tSD, tCD2
Updated read to write (OE=low) timing diagram
Updated Master Reset values for tRS, tRSR, tRSF
Updated pinout
Updated VCORE voltage range
*C
129936
09/30/03
SPN
Updated package diagram
Updated tCD2 value on first page
Removed Preliminary status
*D
233830
See ECN
WWZ
Added 4 Mbit and 9 Mbit x72 devices into the data sheet with updated pinout,
pin description table, power table, and timing table
Changed title
Added Preliminary status to reflect the addition of 4 Mbit and 9 Mbit devices
Removed FLEx72-E from the document
Added counter related functions for 4 Mbit and 9 Mbit
Removed standard JTAG description
Updated block diagram
Updated pinout with FTSEL and one more PORTSTD pins per port
Updated tRSF of CYD18S72AV value
*E
288892
See ECN
WWZ
Change pinout D15 from REV[2,4] to VSS to reflect SC pin removal
*F
327355
See ECN
AEQ
Changed pinout K3 from NC to NC[2,5]
Changed pinout K20 from NC to NC[2,5]
Changed pinout D15 from VSS to NC
Changed pinout D8 and M3 from REVL[2,4] to VSS
Changed pinout M20 and W15 from REVR[2,4] to VSS
*G
345735
See ECN
PCX
VREF Pin Definition Updated
Added Pb-Free Part Ordering Informations
*H
360316
See ECN
YDT
Added note for VCORE
Changed notes for PORTSTD to VSS
Changed ICC, ISB1, ISB2 and ISB4 number for CYD09S72V per PE request
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CYD18S72V | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:FLEx72⑩ 3.3V 64K/128K/256K x 72 Synchronous Dual-Port RAM |
| CYD18S72V-100BBC | 功能描述:靜態(tài)隨機存取存儲器 18M (256Kx72) 3.3v 100MHz Synch 靜態(tài)隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CYD18S72V-100BBI | 功能描述:靜態(tài)隨機存取存儲器 18M (256Kx72) 3.3v 100MHz Synch 靜態(tài)隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CYD18S72V-100BBXC | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:FLEx72⑩ 3.3V 64K/128K/256K x 72 Synchronous Dual-Port RAM |
| CYD18S72V-100BBXI | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:FLEx72⑩ 3.3V 64K/128K/256K x 72 Synchronous Dual-Port RAM |
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