參數(shù)資料
型號(hào)： DAC1008D650HN
廠商： NXP SEMICONDUCTORS
元件分類(lèi)： DAC
英文描述： Dual 10-bit DAC; up to 650 Msps; 2×, 4× or 8× interpolating
中文描述： 10-BIT DAC, PQCC64
封裝： 9 X 9 MM, 0.85 MM HEIGHT, PLASTIC, SOT804-3, VQFN-64
文件頁(yè)數(shù)： 37/98頁(yè)
文件大小： 551K
代理商： DAC1008D650HN
DAC1008D650
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 17 December 2010
37 of 98
NXP Semiconductors
DAC1008D650
2
×
, 4
×
or 8
×
interpolating DAC with JESD204A
10.13.4
Phase correction
The Analog Quadrature Modulator which follows the DACs may have a phase imbalance
which will result in undesired sidebands. By adjusting the phase between the I and Q
channels, the spur can be reduced.
Without compensation the I and Q have a phase difference of
Π
/ 2 (90
°
). The registers
PHASECORR_CNTRL0 and PHASECORR_CNTRL1 located in register page 0 allow a
phase variation from 75.7
°
to 104.3
°
. The two registers define a signed value that ranges
from
512 to +511. The resulting phase compensation (in radians) is given by the
equation: PHASE_CORR[9:0] / 2048.
10.14 Power and grounding
The power supplies should be decoupled with the following ground pins to optimize the
decoupling:
V
DDA(1V8)
: pin 38 with pin 37; pin 44 with pin 43; pin 11 with pin 12; pin 17 with pin 18;
pin 32 with pin 31
10.15 Configuration interface
10.15.1
Register description
DAC1008D650 implements indirect addressing using a page access method. The
page-address is located at address 0x1F and is by default 0x00, which selects page 0 as
default page. For example, to access registers which configure the JESDRX, one must
first activate page 4 by writing 0x04 to the page-address 0x1F.
The DAC1008D650 contains six different pages.
The device has no embedded power-on-reset feature. Driving the RESET_N pin to set the
device to its default state is mandatory.
10.15.2
Detailed descriptions of registers
The register information has been provided in page form accompanied by a detailed
description for each bit in the tables following the register allocation map of each page.
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DAC1008D650HN Dual 10-bit DAC; up to 650 Msps; 2×, 4× or 8× interpolating
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DAC1008D650HN/C1,5 功能描述:數(shù)模轉(zhuǎn)換器- DAC DL 10BIT DAC 650MSPS 2X 4X OR 8X INT RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類(lèi)型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
DAC1008D650HN-C1 功能描述:數(shù)模轉(zhuǎn)換器- DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類(lèi)型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
DAC1008D750 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Dual 10-bit DAC up to 750 Msps 2×, 4× or 8× interpolating with JESD204A interface
DAC1008D750_11 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Dual 10-bit DAC; up to 750 Msps; 2×, 4× or 8× interpolating
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