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| 型號(hào)： | DAC2KY |
| 英文描述： | Dual, 12-Bit, 125MSPS DIGITAL-TO-ANALOG CONVERTER |
| 中文描述： | 雙通道，12位，125Msps數(shù)字模擬轉(zhuǎn)換器 |
| 文件頁(yè)數(shù)： | 1/17頁(yè) |
| 文件大小： | 389K |
| 代理商： | DAC2KY |
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Dual, 12-Bit, 125MSPS
DIGITAL-TO-ANALOG CONVERTER
FEATURES
G
125MSPS UPDATE RATE
G
SINGLE SUPPLY: +3.3V or +5V
G
HIGH SFDR: 70dB at f
OUT
= 20MHz
G
LOW GLITCH: 2pVs
G
LOW POWER: 310mW
G
INTERNAL REFERENCE
G
POWER-DOWN MODE: 23mW
APPLICATIONS
G
COMMUNICATIONS:
Base Stations, WLL, WLAN
Baseband I/Q Modulation
G
MEDICAL/TEST INSTRUMENTATION
G
ARBITRARY WAVEFORM GENERATORS (ARB)
G
DIRECT DIGITAL SYNTHESIS (DDS)
DESCRIPTION
The DAC2902 is a monolithic, 12-bit, dual-channel,
high-speed Digital-to-Analog Converter (DAC), and is opti-
mized to provide high dynamic performance while dissipating
only 310mW.
Operating with high update rates of up to 125MSPS, the
DAC2902 offers exceptional dynamic performance, and
enables the generation of very-high output frequencies suit-
able for “Direct IF” applications. The DAC2902 has been
optimized for communications applications in which sepa-
rate I and Q data are processed while maintaining tight gain
and offset matching.
Each DAC has a high-impedance differential-current output,
suitable for single-ended or differential analog-output con-
figurations.
The DAC2902 combines high dynamic performance with a
high throughput rate to create a cost-effective solution for a
wide variety of waveform-synthesis applications:
Pin compatibility between family members provides 10-bit
(DAC2900), 12-bit (DAC2902), and 14-bit (DAC2904)
resolution.
Pin compatible to the AD9765 dual DAC.
Gain matching is typically 0.5% of full-scale, and offset
matching is specified at 0.02% max.
The DAC2902 utilizes an advanced CMOS process; the
segmented architecture minimizes output-glitch energy,
and maximizes the dynamic performance.
All digital inputs are +3.3V and +5V logic compatible. The
DAC2902 has an internal reference circuit, and allows use
of an external reference.
The DAC2902 is available in a TQFP-48 package, and is
specified over the extended industrial temperature range of
–40°C to +85°C.
DAC2902
DAC2902
SBAS167A – APRIL 2002
www.ti.com
Copyright 2002, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
!
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相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DAC2902 | Dual, 12-Bit, 125MSPS DIGITAL-TO-ANALOG CONVERTER |
| DAC2902-EVM | Dual, 12-Bit, 125MSPS DIGITAL-TO-ANALOG CONVERTER |
| DAC2900-EVM | DAC2900 10-bit, 125MSPS DC EVM(DAC2900 10位, 125MSPS DC 評(píng)估板) |
| DAC2902-EVM | DAC2902 12-bit, 125MSPS DC EVM(DAC2902 12位, 125MSPS DC 評(píng)估板) |
| DAC2904-EVM | DAC2904 14-bit, 125MSPS DC EVM(DAC2904 14位, 125MSPS DC 評(píng)估板) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DAC312 | 制造商:AD 制造商全稱:Analog Devices 功能描述:12-Bit High Speed Multiplying D/A Converter |
| DAC312BR | 制造商:Rochester Electronics LLC 功能描述:12-BIT HIGH-SPEED MULTIPL - Bulk |
| DAC312BR/883 | 制造商:AD 制造商全稱:Analog Devices 功能描述:12-Bit High Speed Multiplying D/A Converter |
| DAC312BR/883C | 制造商:Analog Devices 功能描述:DAC 1-CH R-2R 12-bit 20-Pin CDIP Tube 制造商:Rochester Electronics LLC 功能描述:12-BIT HI-SPEED MULT-LEV.B - Bulk |
| DAC312ER | 功能描述:IC DAC 12BIT MULT HS 20-CDIP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Data Converter Fundamentals DAC Architectures 標(biāo)準(zhǔn)包裝:750 系列:- 設(shè)置時(shí)間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:雙 ± 功率耗散（最大）:100mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-LCC（J 形引線） 供應(yīng)商設(shè)備封裝:28-PLCC（11.51x11.51） 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:143k |
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