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參數(shù)資料
| 型號(hào)： | DAC2KY |
| 英文描述： | Dual, 12-Bit, 125MSPS DIGITAL-TO-ANALOG CONVERTER |
| 中文描述： | 雙通道，12位，125Msps數(shù)字模擬轉(zhuǎn)換器 |
| 文件頁(yè)數(shù)： | 11/17頁(yè) |
| 文件大?。?/td> | 389K |
| 代理商： | DAC2KY |
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DAC2902
SBAS167A
11
As shown in Figure 3, the transformer
’
s center tap is con-
nected to ground. This forces the voltage swing on I
OUT
and
I
OUT
to be centered at 0V. In this case the two resistors, R
L
,
may be replaced with one, R
DIFF
, or omitted altogether. This
approach should only be used if all components are close to
each other, and if the VSWR is not important. A complete
power transfer from the DAC output to the load can be
realized, but the output compliance range should be ob-
served. Alternatively, if the center tap is not connected, the
signal swing will be centered at R
L
I
OUTFS
/2. However, in
this case, the two resistors (R
L
) must be used to enable the
necessary DC-current flow for both outputs.
The OPA680 is configured for a gain of two. Therefore,
operating the DAC2902 with a 20mA full-scale output will
produce a voltage output of ±1V. This requires the amplifier
to operate off of a dual power supply (±5V). The tolerance
of the resistors typically sets the limit for the achievable
common-mode rejection. An improvement can be obtained
by fine tuning resistor R
4
.
This configuration typically delivers a lower level of ac
performance than the previously discussed transformer solu-
tion because the amplifier introduces another source of dis-
tortion. Suitable amplifiers should be selected based on their
slew-rate, harmonic distortion, and output swing capabilities.
High-speed amplifiers like the OPA680 or OPA687 may be
considered. The ac performance of this circuit may be im-
proved by adding a small capacitor (C
DIFF
) between the
outputs I
OUT
and I
OUT
, as shown in Figure 4). This will
introduce a real pole to create a low-pass filter in order to
slew-limit the DAC
’
s fast output signal steps, that otherwise
could drive the amplifier into slew-limitations or into an
overload condition; both would cause excessive distortion.
The difference amplifier can easily be modified to add a level
shift for applications requiring the single-ended output volt-
age to be unipolar, i.e., swing between 0V and +2V.
DUAL TRANSIMPEDANCE OUTPUT CONFIGURATION
The circuit example of Figure 5 shows the signal output
currents connected into the summing junctions of the dual
voltage-feedback op amp OPA2680 that is set up as a
transimpedance stage, or
‘
I-to-V converter
’
. With this cir-
cuit, the DAC
’
s output will be kept at a virtual ground,
minimizing the effects of output impedance variations, which
results in the best DC linearity (INL). As mentioned previ-
ously, care should be taken not to drive the amplifier into
slew-rate limitations, and produce unwanted distortion.
DIFFERENTIAL CONFIGURATION USING AN OP AMP
If the application requires a DC-coupled output, a difference
amplifier may be considered, as shown in Figure 4. Four
external resistors are needed to configure the voltage-feed-
back op amp OPA680 as a difference amplifier performing
the differential to single-ended conversion. Under the shown
configuration, the DAC2902 generates a differential output
signal of 0.5Vp-p at the load resistors, R
L
. The resistor
values shown were selected to result in a symmetric 25
loading for each of the current outputs since the input
impedance of the difference amplifier is in parallel to resis-
tors R
L
, and should be considered.
FIGURE 4. Difference Amplifier Provides Differential to
Single-Ended Conversion and DC-Coupling.
FIGURE 5. Dual, Voltage-Feedback Amplifier OPA2680
Forms Differential Transimpedance Amplifier.
FIGURE 3. Differential Output Configuration Using an RF
Transformer.
DAC2902
I
OUT
I
OUT
1:1
ADTT1-1
(Mini-Circuits)
R
L
50
R
L
50
R
S
50
R
DIFF
100
I
OUT
I
OUT
DAC2902
R
26.1
R
28.7
R
4
402
R
3
200
R
2
402
R
1
200
OPA680
C
OPT
+5V
V
OUT
–
5V
1/2
OPA2680
1/2
OPA2680
DAC2902
–
V
OUT
= I
OUT
R
F
1
–
V
OUT
= I
OUT
R
F
2
R
F1
R
F2
C
F1
C
F2
C
D1
C
D2
I
OUT
I
OUT
50
50
–
5V
+5V
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DAC2902 | Dual, 12-Bit, 125MSPS DIGITAL-TO-ANALOG CONVERTER |
| DAC2902-EVM | Dual, 12-Bit, 125MSPS DIGITAL-TO-ANALOG CONVERTER |
| DAC2900-EVM | DAC2900 10-bit, 125MSPS DC EVM(DAC2900 10位, 125MSPS DC 評(píng)估板) |
| DAC2902-EVM | DAC2902 12-bit, 125MSPS DC EVM(DAC2902 12位, 125MSPS DC 評(píng)估板) |
| DAC2904-EVM | DAC2904 14-bit, 125MSPS DC EVM(DAC2904 14位, 125MSPS DC 評(píng)估板) |
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