- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄8978 > DAC8143FSZ (Analog Devices Inc)IC DAC 12BIT DAISY-CHAIN 16-SOIC PDF資料下載
參數(shù)資料
| 型號： | DAC8143FSZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 3/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 12BIT DAISY-CHAIN 16-SOIC |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 標準包裝： | 47 |
| 設(shè)置時間： | 380ns |
| 位數(shù)： | 12 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 500µW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SOIC W |
| 包裝： | 管件 |
| 輸出數(shù)目和類型： | 2 電流，單極；2 電流，雙極 |
| 采樣率（每秒）： | 2.63M |
| 產(chǎn)品目錄頁面： | 786 (CN2011-ZH PDF) |
DAC8143
–11–
REV. C
ANALOG/DIGITAL DIVISION
The transfer function for the DAC8143 connect in the multiply-
ing mode as shown in Figures 16 and 17 is:
VO = –VIN
A1
21
+
A2
22
+
A3
23
+ ...
A12
212
where AX assumes a value of 1 for an “ON” bit and 0 for an
“OFF” bit.
The transfer function is modified when the DAC is connected in
the feedback of an operational amplifier as shown in Figure 20
and is:
VO =
–VIN
A1
21
+
A2
22
+
A3
23
+ ...
A12
212
The above transfer function is the division of an analog voltage
(VREF) by a digital word. The amplifier goes to the rails with all
bits “OFF” since division by zero is infinity. With all bits “ON”
the gain is 1 (
±1 LSB). The gain becomes 4096 with the LSB,
Bit 12, “ON”.
BUFFERED DIGITAL
DATA OUT
+5V
SRO
VREF
VDD
RFB
IOUT1
DAC8143
AGND
DGND
32 12
15
6
14
16
1
3
2
6
VIN
VOUT
413
DIGITAL
INPUTS
OP-42
+
–
Figure 20. Analog/Digital Divider
APPLICATION TIPS
In most applications, linearity depends on the potential of IOUT1,
IOUT2, and AGND (Pins 1, 2 and 3) being exactly equal to each
other. In most applications, the DAC is connected to an exter-
nal op amp with its noninverting input tied to ground (see Fig-
ures 16 and 17). The amplifier selected should have a low input
bias current and low drift over temperature. The amplifier’s
input offset voltage should be nulled to less than
±200 V (less
than 10% of 1 LSB).
The operational amplifier’s noninverting input should have a
minimum resistance connection to ground; the usual bias cur-
rent compensation resistor should not be used. This resistor can
cause a variable offset voltage appearing as a varying output
error. All grounded pins should tie to a single common ground
point, avoiding ground loops. The VDD power supply should
have a low noise level with no transients greater than +17 V.
It is recommended that the digital inputs be taken to ground or
VDD via a high value (1 M) resistor; this will prevent the accu-
mulation of static charge if the PC card is disconnected from the
system.
Peak supply current flows as the digital input pass through the
transition region (see Figure 4). The supply current decreases as
the input voltage approaches the supply rails (VDD or DGND),
i.e., rapidly slewing logic signals that settle very near the supply
rails will minimize supply current.
INTERFACING TO THE MC6800
As shown in Figure 21, the DAC8143 may be interfaced to the
6800 by successively executing memory WRITE instruction
while manipulating the data between WRITEs, so that each
WRITE presents the next bit.
In this example, the most significant bits are found in memory
locations 0000 and 0001. The four MSBs are found in the lower
half of 0000, the eight LSBs in 0001. The data is taken from the
DB7 line.
The serial data loading is triggered by STB4 which is asserted by
a decoded memory WRITE to a memory location, R/
W, and
Φ2. A WRITE to another address location transfers data from
input register to DAC register.
STB1
DAC8143*
SRI
SRO
LD2
LD1
STB3
STB2
STB4
CLR
74LS138
ADDRESS
DECODER
A0 A2
E1
E3
E2
A0
A15
R/
W
DB0
DB7
MC6800
16-BIT ADDRESS BUS
8-BIT DATA BUS
+5V
FROM SYSTEM RESET
*ANALOG CIRCUITRY OMITTED FOR SIMPLICITY
φ2
Figure 21. DAC8143—MC6800 Interface
ADDRESS
DECODER
STROBE
LOAD
DAC8143
SRI
SRO
ADDRESS BUS
STROBE
LOAD
DAC8143
SRI
SRO
STROBE
LOAD
DAC8143
SRI
SRO
STROBE
LOAD
DAC8143
SRI
SRO
DBX
P
WR
Figure 19. Multiple DAC8143s with Three-Wire Interface
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IDT74ALVC164245PAG8 | IC TRANSCVR TRI-ST 16BIT 48TSSOP |
| ICS843321AGI-12LFT | IC SYNTHESIZER CLK SONET 8TSSOP |
| VE-J0V-MZ-F1 | CONVERTER MOD DC/DC 5.8V 25W |
| VE-J0T-MZ-F4 | CONVERTER MOD DC/DC 6.5V 25W |
| LTC1454CN#PBF | IC D/A CONV 12BIT R-R DUAL 16DIP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DAC8143FSZ-REEL | 功能描述:IC DAC 12BIT DAISYCHAIN 16SOIC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 標準包裝:47 系列:- 設(shè)置時間:2µs 位數(shù):14 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:55µW 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:管件 輸出數(shù)目和類型:1 電流，單極；1 電流，雙極 采樣率（每秒）:* |
| DAC8162 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:DUAL 16-/14-/12-BIT, ULTRALOW-GLITCH, LOW-POWER, BUFFERED, VOLTAGE-OUTPUT |
| DAC8162SDGSR | 功能描述:數(shù)模轉(zhuǎn)換器- DAC 14B,Dual,Lo Pwr Ultra-Lo Glitch DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| DAC8162SDGST | 功能描述:數(shù)模轉(zhuǎn)換器- DAC 14B,Dual,Lo Pwr Ultra-Lo Glitch DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| DAC8162SDSCR | 功能描述:數(shù)模轉(zhuǎn)換器- DAC 14B,Dual,Lo Pwr Ultra-Lo Glitch DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。