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參數(shù)資料
| 型號(hào)： | DAC8248FSZ-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 5/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 12BIT DUAL W/BUFF 24SOIC |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 設(shè)置時(shí)間： | 1µs |
| 位數(shù)： | 12 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 50µW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 24-SOIC W |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 2 電流，單極；2 電流，雙極 |
| 采樣率（每秒）： | 1M |
DAC8248
–13–
REV. B
loading the appropriate DAC’s digital inputs with 0000 0000
0000 and adjusting the op amp’s offset voltage to 0 V. It is rec-
ommended that the op amp offset voltage be adjusted to less
than 10% of 1 LSB (244
V), and over the operating tempera-
ture range of interest. This will ensure the DAC’s monotonicity
and minimize gain and linearity errors.
BIPOLAR OPERATION
The bipolar (offset binary) 4-quadrant configuration using the
DAC8248 is shown in Figure 8, and the corresponding code is
shown in Table II. The circuit makes use of the OP470, a quad
op amp (use four OP42s for applications requiring higher
speeds).
The full-scale output voltage may be adjusted by varying VREF or
the value of R5 and R8, and thus eliminating resistors R1, R2,
R3, and R4. If resistors R1 through R4 are omitted, then R5, R6,
R7 (R8, R9, and R10 for DAC B) should be ratio-matched to
0.01% to keep gain error within data sheet specifications. The re-
sistors should have identical temperature-coefficients if operating
over the full temperature range.
Zero and full-scale are adjusted in one of two ways and are at
the users discretion. Zero-output is adjusted by loading the ap-
propriate DAC’s digital inputs with 1000 0000 0000 and vary-
ing R1 (R3 for DAC B) so that VOUT A (or VOUT B) equals 0 V.
If R1, R2 (R3, R4 for DAC B) are omitted, then zero output
can be adjusted by varying R6, R7 ratios (R9, R10 for DAC B).
Full-scale is adjusted by loading the appropriate DAC’s digital
inputs with 1111 1111 1111 and varying R5 (R8 for DAC B).
Table II. Bipolar (Offset Binary) Code Table
(Refer to Figure 8)
Binary Number in
DAC Register
Analog Output, VOUT
MSB
LSB
(DAC A or DAC B)
1111 1111 1111
+VREF
2047
2048
1000 0000 0001
+VREF
1
2048
1000 0000 0000
0 V
0111 1111 1111
–VREF
1
2048
0000 0000 0000
–VREF
2048
NOTE:
1 LSB=(2
–11)(V
REF) =
1
2048
(VREF)
SINGLE SUPPLY OPERATION
CURRENT STEERING MODE
Because the DAC8248’s R-2R resistor ladder terminating resis-
tor is internally connected to AGND, it lends itself well for
single supply operation in the current steering mode configura-
tion. This means that AGND can be raised above system
Figure 8. Bipolar Configuration (4-Quadrant Multiplication)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DAC8248FW | 制造商:Analog Devices 功能描述: |
| DAC8248GBC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:12-Bit Digital-to-Analog Converter |
| DAC8248GP | 制造商:AD 制造商全稱:Analog Devices 功能描述:Dual 12-Bit 8-Bit Byte Double-Buffered CMOS D/A Converter |
| DAC8248GPZ | 功能描述:IC DAC 12BIT DUAL W/BUFF 24DIP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 設(shè)置時(shí)間:4.5µs 位數(shù):12 數(shù)據(jù)接口:串行，SPI? 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:8-SOICN 包裝:剪切帶 (CT) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:* 其它名稱:MCP4921T-E/SNCTMCP4921T-E/SNRCTMCP4921T-E/SNRCT-ND |
| DAC8248HP | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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