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參數(shù)資料
| 型號： | DAC8408GPZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 3/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 8BIT QUAD W/MEMORY 28DIP |
| 產(chǎn)品培訓模塊： | Data Converter Fundamentals DAC Architectures |
| 標準包裝： | 13 |
| 設(shè)置時間： | 190ns |
| 位數(shù)： | 8 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 4 |
| 電壓電源： | 單電源 |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 28-DIP（0.600"，15.24mm） |
| 供應商設(shè)備封裝： | 28-PDIP |
| 包裝： | 管件 |
| 輸出數(shù)目和類型： | 4 電流，單極；4 電流，雙極 |
| 采樣率（每秒）： | 5.26M |
DAC8408
–11–
REV. A
Figure 7. Quad DAC Bipolar Operation (4-Quadrant Multiplication)
Table II. Bipolar (Offset Binary) Code Table
(Refer to Figure 7)
DAC Data Input
Analog Output
MSB
LSB
(DAC A OR DAC B)
1 1 1 1 1 1 1 1
+VREF
127
128
1 0 0 0 0 0 0 1
+VREF
1
128
1 0 0 0 0 0 0 0
0
0 1 1 1 1 1 1 1
–VREF
1
128
0 0 0 0 0 0 0 1
–VREF
127
128
0 0 0 0 0 0 0 0
–VREF
128
NOTE
1 LSB = (2
–7) (V
REF) =
1
128
(VREF)
APPLICATION HINTS
General Ground Management: AC or transient voltages be-
tween AGND and DGND can appear as noise at the DAC8408’s
analog output. Note that in Figures 5 and 6, IOUT2A/IOUT2B and
IOUT 2C/IOUT 2D are connected to AGND. Therefore, it is rec-
ommended that AGND and DGND be tied together at the
DAC8408 socket. In systems where AGND and DGND are tied
together on the backplane, two diodes (1N914 or equivalent)
should be connected in inverse parallel between AGND and
DGND.
Write Enable Timing: During the period when both DS and
R/W are held low, the DAC latches are transparent and the ana-
log output responds directly to the digital data input. To pre-
vent unwanted variations of the analog output, the R/W should
not go low until the data bus is fully settled (DATA VALID).
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相關(guān)代理商/技術(shù)參數(shù) |
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| DAC8408HP | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Analog Devices 功能描述: |
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| DAC8411EVM | 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開發(fā)工具 DAC8411 Eval Mod RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V |
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