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參數(shù)資料
| 型號(hào)： | DAC8512GBC |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | DAC |
| 英文描述： | % V, Serial Input Complete 12-Bit DAC |
| 中文描述： | SERIAL INPUT LOADING, 16 us SETTLING TIME, 12-BIT DAC, UUC8 |
| 封裝： | DIE-8 |
| 文件頁(yè)數(shù)： | 2/20頁(yè) |
| 文件大?。?/td> | 757K |
| 代理商： | DAC8512GBC |
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REV. A
–2–
DAC8512–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
Parameter
Symbol
Condition
Min
Typ
Max
Units
STATIC PERFORMANCE
Resolution
Relative Accuracy
N
INL
Note 2
12
–1
–2
–1
Bits
LSB
LSB
LSB
LSB
V
V
ppm/
°
C
E Grade
F Grade
±
1/4
±
3/4
±
3/4
+1/2
4.095
4.095
16
+1
+2
+1
+3
4.103
4.111
Differential Nonlinearity
Zero-Scale Error
Full-Scale Voltage
DNL
V
ZSE
V
FS
No Missing Codes
Data = 000
H
Data = FFF
H3
E Grade
F Grade
4.087
4.079
Full-Scale Tempco
TCV
FS
Notes 3, 4
ANALOG OUTPUT
Output Current
Load Regulation at Full Scale
Capacitive Load
I
OUT
L
REG
C
L
Data = 800
H
R
L
= 402
to
∞
, Data = 800
H
No Oscillation
4
±
5
±
7
1
500
mA
LSB
pF
3
LOGIC INPUTS
Logic Input Low Voltage
Logic Input High Voltage
Input Leakage Current
Input Capacitance
V
IL
V
IH
I
IL
C
IL
0.8
V
V
μ
A
pF
2.4
10
10
INTERFACE TIMING SPECIFICATIONS
1, 4
Clock Width High
Clock Width Low
Load Pulse Width
Data Setup
Data Hold
Clear Pulse Width
Load Setup
Load Hold
Select
Deselect
t
CH
t
CL
t
LDW
t
DS
t
DH
t
CLRW
t
LD1
t
LD2
t
CSS
t
CSH
30
30
20
15
15
30
15
10
30
20
10
10
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
10
5
20
AC CHARACTERISTICS
4
Voltage Output Settling Time
DAC Glitch
Digital Feedthrough
t
S
To
±
1 LSB of Final Value
5
16
15
15
μ
s
nV s
nV s
SUPPLY CHARACTERISTICS
Positive Supply Current
I
DD
V
IH
= 2.4 V, V
IL
= 0.8 V, No Load
V
DD
= 5 V, V
IL
= 0 V, No Load
V
IH
= 2.4 V, V
IL
= 0.8 V, No Load
V
DD
= 5 V, V
IL
= 0 V, No Load
V
DD
=
±
5%
1.5
0.5
7.5
2.5
0.002
2.5
1
12.5
5
0.004
mA
mA
mW
mW
%/%
Power Dissipation
P
DISS
Power Supply Sensitivity
PSS
NOTES
1
All input control signals are specified with tr = tf = 5 ns (10% to 90% of +5 V) and timed from a voltage level of 1.6 V.
2
1 LSB = 1 mV for 0 V to +4.095 V output range.
3
Includes internal voltage reference error.
4
These parameters are guaranteed by design and not subject to production testing.
5
The settling time specification does not apply for negative going transitions within the last 6 LSBs of ground. Some devices exhibit double the typical settling time in
this 6 LSB region.
Specifications subject to change without notice.
(@ V
DD
= +5.0 V
6
5%, –40
8
C
≤
T
A
≤
+85
8
C, unless otherwise noted)
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