參數(shù)資料
型號(hào)： DAC8544I
廠商： Texas Instruments, Inc.
英文描述： QUAD, 16-BIT, RAIL-TO-RAIL VOLTAGE OUTPUT, PARALLEL INTERFACE, DIGITAL-TO-ANALOG CONVERTER
中文描述： 四，16位，軌到軌電壓輸出，并行接口，數(shù)字模擬轉(zhuǎn)換器
文件頁數(shù)： 12/20頁
文件大?。?/td> 476K
代理商： DAC8544I
www.ti.com
98
96
94
92
90
88
86
84
0
500
1 k
1.5 k
Output Frequency Hz
2 k
2.5 k
3 k
3.5 k
4 k
4.5 k
S
V
DD
= V
REF
1 dB FSR Digital Input, F
S
= 52 K
sps
Measurement Bandwidth = 20 kHz
V
DD
= 5 V
V
DD
= 2.7 V
0
500
1 k
1.5 k
Output Frequency Hz
2 k
2.5 k
3 k
3.5 k
4 k
T
V
DD
= V
REF
= 5 V
F
S
= 52 K
sps
1 dB FSR Digital Input
Measurement Bandwidth = 20 kHz
THD
3rd Harmonic
2nd Harmonic
0
10
20
30
40
50
60
70
80
90
100
VO
t Time 2 s/div
Small-Signal Settling
Trigger Signal
0
10
20
30
40
50
60
70
80
90
100
0
500
1 k
1.5 k
Output Frequency Hz
2 k
2.5 k
3 k
3.5 k
4 k
T
V
DD
= V
REF
= 2.7 V
F
S
= 52 K
sps,
1 dB FSR Digital Input
Measurement Bandwidth = 20 kHz
THD
3rd Harmonic
2nd Harmonic
VO
t Time 2 s/div
Small-Signal Settling
Trigger Signal
DAC8544
SLAS420–MAY 2004
TYPICAL CHARACTERISTICS (continued)
This condition applies to all typical characteristics: V
REF+
= V
DD
, V
REF–
= GND, T
A
= 25
°
C (unless otherwise noted)
SIGNAL-TO-NOISE
vs
OUTPUT FREQUENCY
TOTAL HARMONIC DISTORTION
vs
OUTPUT FREQUENCY
Figure 25.
Figure 26.
TOTAL HARMONIC DISTORTION
vs
OUTPUT FREQUENCY
FULL-SCALE SETTLING TIME
(SMALL-SIGNAL POSITIVE-GOING STEP)
Figure 27.
Figure 28.
FULL-SCALE SETTLING TIME
(SMALL-SIGNAL NEGATIVE-GOING STEP)
Figure 29.
12
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