參數(shù)資料
型號: DAC8562EP
廠商: ANALOG DEVICES INC
元件分類: DAC
英文描述: +5 Volt, Parallel Input Complete 12-Bit DAC
中文描述: PARALLEL, WORD INPUT LOADING, 16 us SETTLING TIME, 12-BIT DAC, PDIP20
封裝: PLASTIC, DIP-20
文件頁數(shù): 12/16頁
文件大?。?/td> 636K
代理商: DAC8562EP
DAC8562
REV. A
–12–
Alternatively, the output voltage can be coded in complementary
offset binary using the circuit in Figure 35. This configuration
eliminates the need for a pull-down resistor or an op amp for
REFOUT The transfer equation of the circuit is given by:
V
O
=
–1
mV
×
Digital Code
×
R
2
R
1
+
REFOUT
×
R
4
R
3
+
R
4
×
1
+
R
2
R
1
and, for the values shown, becomes:
V
O
=
2.44
mV
×
Digital Code
+
5
V
DAC-8562
REFOUT
V
OUT
R1
R4
R3
R2
V
O
V
RANGE
±5V
R2
23.7k + 715
R4
13.7k + 169
R1 = R3 = 10k
Figure 35 Bipolar Output Operation Without
Trim Version 2
Generating a Negative Supply Voltage
Some applications may require bipolar output configuration, but
only have a single power supply rail available. This is very com-
mon in data acquisition systems using microprocessor-based sys-
tems. In these systems, only +12 V, +15 V, and/or +5 V are
available. Shown in Figure 36 is a method of generating a nega-
tive supply voltage using one CD4049, a CMOS hex inverter,
operating on +12 V or +15 V. The circuit is essentially a charge
pump where two of the six are used as an oscillator. For the val-
ues shown, the frequency of oscillation is approximately 3.5 kHz
and is fairly insensitive to supply voltage because R1 > 2
3
R2.
The remaining four inverters are wired in parallel for higher out-
put current. The square-wave output is level translated by C2 to
a negative-going signal, rectified using a pair of 1N4001s, and
then filtered by C3. With the values shown, the charge pump
will provide an output voltage of –5 V for current loading in the
range 0.5 mA
I
OUT
10 mA with a +15 V supply and
0.5 mA
I
OUT
7 mA with a +12 V supply.
9
10
6
11
12
14
15
7
3
2
5
4
R2
5.1k
R1
510k
C1
0.02μF
C2
47μF
D1
1N4001
C3
47μF
1N5231
5.1V
ZENER
D2
1N4001
R3
470
–5V
INVERTERS = CD4049
Figure 36. Generating a –5 V Supply When
Only +12 V or +15 V Are Available
Audio Volume Control
The DAC8562 is well suited to control digitally the gain or
attenuation of a voltage controlled amplifiers. In professional
audio mixing consoles, music synthesizers, and other audio proces-
sors, VCAs, such as the SSM2018, adjust audio channel gain and
attenuation from front panel potentiometers. The VCA provides a
clean gain transition control of the audio level when the slew rate of
the analog input control voltage, V
C
, is properly chosen. The cir-
cuit in Figure 37 illustrates a volume control application using the
DAC8562 to control the attenuation of the SSM2018.
15
16
DGND
10
AGND
12
DATA
DAC-8562
13
+15V
CE
CLR
20
0.1μF
4
REF-02
6
2
0.1μF
18k
10pF
470k
P1
100k
OFFSET
TRIM
10M
47pF
SYMMETRY
P2
500k
V
OUT
+15V
–15V
30k
+15V
–15V
0.1μF
0.1μF
+15V
18k
V
IN
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
SSM-2018
+5V
C
CON
1μF
R6
R7
1k
*
0V
V
C
+2.24V
* – COMPENSATOR
1k
Figure 37. Audio Volume Control
Since the supply voltage available in these systems is typically
±
15 V or
±
18 V, a REF02 is used to supply the +5 V required
to power the DAC. No trimming of the reference is required be-
cause of the reference’s tight initial tolerance and low supply
current consumption of the DAC8562. The SSM2018 is config-
ured as a unity-gain buffer when its control voltage equals
0 volt. This corresponds to a 000
H
code from the DAC8562.
Since the SSM2018 exhibits a gain constant of –28 mV/dB
(typical), the DAC’s full-scale output voltage has to be scaled
down by R6 and R7 to provide 80 dB of attenuation when the
digital code equals FFF
H
. Therefore, every DAC LSB corre-
sponds to 0.02 dB of attenuation. Table V illustrates the attenu-
ation versus digital code of the volume control circuit.
Table V. SSM2018 VCA Attenuation vs.
DAC8562 Input Code
Hexadecimal Number
in DAC Register
Control Voltage
(V)
VCA Attenuation
(dB)
000
400
800
C00
FFF
0
+0.56
+1.12
+1.68
+2.24
0
20
40
60
80
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