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參數(shù)資料
| 型號： | DAC908U/1K |
| 元件分類： | DAC |
| 英文描述： | PARALLEL, 8 BITS INPUT LOADING, 0.03 us SETTLING TIME, 8-BIT DAC, PDSO28 |
| 封裝： | SOP-28 |
| 文件頁數(shù)： | 4/15頁 |
| 文件大?。?/td> | 180K |
| 代理商： | DAC908U/1K |
DAC908
12
FIGURE 3. Differential Output Configuration Using an RF
Transformer.
FIGURE 4. Difference Amplifier Provides Differential to
Single-Ended Conversion and DC-Coupling.
FIGURE 5. Dual, Voltage-Feedback Amplifier OPA2680
Forms Differential Transimpedance Amplifier.
As shown in Figure 3, the transformer’s center tap must be
connected to ground to enable the necessary dc-current flow
for both outputs. Some applications may require a solid
termination, in which case a differential resistor, RDIFF, may
be inserted as shown. Note that this will reduce the available
signal power by approximately one half.
DIFFERENTIAL CONFIGURATION USING AN OP AMP
If the application requires a dc-coupled output, a difference
amplifier may be considered, as shown in Figure 4. Four
external resistors are needed to configure the voltage-feed-
back op amp OPA680 as a difference amplifier performing
the differential to single-ended conversion. Under the shown
configuration, the DAC908 generates a differential output
signal of 0.5Vp-p at the load resistors, RL. The resistor
values shown were selected to result in a symmetric 25
loading for each of the current outputs since the input
impedance of the difference amplifier is in parallel to resis-
tors RL, and should be considered.
The OPA680 is configured for a gain of two. Therefore,
operating the DAC908 with a 20mA full-scale output will
produce a voltage output of
±1V. This requires the amplifier
to operate off of a dual power supply (
±5V). The tolerance
of the resistors typically sets the limit for the achievable
common-mode rejection. An improvement can be obtained
by fine tuning resistor R4.
This configuration typically delivers a lower level of ac
performance than the previously discussed transformer solu-
tion because the amplifier introduces another source of
distortion. Suitable amplifiers should be selected based on
their slew-rate, harmonic distortion, and output swing capa-
bilities. High-speed amplifiers like the OPA680 or OPA687
may be considered. The ac performance of this circuit may
be improved by adding a small capacitor, CDIFF, between the
outputs IOUT and IOUT, as shown in Figure 4. This will intro-
duce a real pole to create a low-pass filter in order to slew-
limit the DACs fast output signal steps, which otherwise
could drive the amplifier into slew-limitations or into an
overload condition; both would cause excessive distortion.
The difference amplifier can easily be modified to add a
level shift for applications requiring the single-ended output
voltage to be unipolar, i.e., swing between 0V and +2V.
DUAL TRANSIMPEDANCE OUTPUT CONFIGURATION
The circuit example of Figure 5 shows the signal output
currents connected into the summing junction of the
OPA2680, which is set up as a transimpedance stage, or
‘I to V converter’. With this circuit, the DAC’s output will
be kept at a virtual ground, minimizing the effects of output
impedance variations, and resulting in the best dc linearity
(INL). However, as mentioned previously, the amplifier
may be driven into slew-rate limitations, and produce un-
wanted distortion. This may occur, especially, at high DAC
update rates.
I
OUT
I
OUT
DAC908
1:1
ADT1-1WT
(Mini-Circuits)
50
50
R
L
Optional
R
DIFF
I
OUT
I
OUT
DAC908
R
L
26.1
R
L
28.7
R
4
402
R
3
200
R
2
402
R
1
200
OPA680
C
DIFF
+5V
V
OUT
–5V
1/2
OPA2680
1/2
OPA2680
DAC908
–V
OUT = IOUT RF
–V
OUT = IOUT RF
R
F1
R
F2
C
F1
C
F2
C
D1
C
D2
I
OUT
I
OUT
50
50
–5V
+5V
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| DAC9331-14-2 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:14-Bit Digital-to-Analog Converter |
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