VCC (Pin 1): Positive Supply Voltage. Bypass to GND with a 10 F" />
參數(shù)資料
型號： DC746A
廠商： Linear Technology
文件頁數(shù)： 2/36頁
文件大?。?/td> 0K
描述： BOARD DELTA SIGMA ADC LTC2412
軟件下載： QuikEval System
設(shè)計資源： DC746A Design File
DC746A Schematic
標(biāo)準(zhǔn)包裝： 1
系列： QuikEval™
ADC 的數(shù)量： 1
位數(shù)： 24
采樣率（每秒）： 7.5
數(shù)據(jù)接口： MICROWIRE?，串行，SPI?
工作溫度： 0°C ~ 70°C
已用 IC / 零件： LTC2412
已供物品： 板
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LTC2412
10
2412f
VCC (Pin 1): Positive Supply Voltage. Bypass to GND with
a 10
F tantalum capacitor in parallel with 0.1F ceramic
capacitor as close to the part as possible.
REF+ (Pin 2), REF– (Pin 3): Differential Reference Input.
The voltage on these pins can have any value between GND
and VCC as long as the reference positive input, REF+, is
maintained more positive than the reference negative
input, REF –, by at least 0.1V.
CH0+ (Pin 4): Positive Input for Differential Channel 0.
CH0– (Pin 5): Negative Input for Differential Channel 0.
CH1+ (Pin 6): Positive Input for Differential Channel 1.
CH1– (Pin 7): Negative Input for Differential Channel 1.
The voltage on these four analog inputs (Pins 4 to 7) can
have any value between GND and VCC. Within these limits
the converter bipolar input range (VIN = IN+ – IN–) extends
from – 0.5 (VREF) to 0.5 (VREF). Outside this input range
the converter produces unique overrange and underrange
output codes.
GND (Pins 8, 9, 10, 15, 16): Ground. Multiple ground pins
internally connected for optimum ground current flow and
VCC decoupling. Connect each one of these pins to a ground
planethroughalowimpedanceconnection.Allfive pinsmust
be connected to ground for proper operation.
CS (Pin 11): Active LOW Digital Input. A LOW on this pin
enables the SDO digital output and wakes up the ADC.
Following each conversion the ADC automatically enters
the Sleep mode and remains in this low power state as
long as CS is HIGH. A LOW-to-HIGH transition on CS
during the Data Output transfer aborts the data transfer
and starts a new conversion.
SDO (Pin 12): Three-State Digital Output. During the Data
Output period, this pin is used as serial data output. When
the chip select CS is HIGH (CS = VCC) the SDO pin is in a
high impedance state. During the Conversion and Sleep
periods, this pin is used as the conversion status output.
The conversion status can be observed by pulling CS LOW.
SCK (Pin 13): Bidirectional Digital Clock Pin. In Internal
Serial Clock Operation mode, SCK is used as digital output
for the internal serial interface clock during the Data
Output period. In External Serial Clock Operation mode,
SCK is used as digital input for the external serial interface
clock during the Data Output period. A weak internal pull-
up is automatically activated in Internal Serial Clock Op-
eration mode. The Serial Clock Operation mode is deter-
mined by the logic level applied to the SCK pin at power up
or during the most recent falling edge of CS.
PI FU CTIO S
UU
U
TYPICAL PERFOR A CE CHARACTERISTICS
UW
TEMPERATURE (
°C)
–45
0
SLEEP
MODE
CURRENT
(
A)
1
3
4
5
–15
15
30
90
2412 G39
2
–30
0
45
60
75
6
VCC = 5.5V
VCC = 2.7V
VCC = 5V
VCC = 3V
FO = GND
CS = VCC
SCK = NC
SDO = NC
Sleep Mode Current
vs Temperature
OUTPUT DATA RATE (READINGS/SEC)
0
100
SUPPLY
CURRENT
(
A)
200
400
500
600
60 70 80 90
1000
2412 G38
300
10 20 30 40 50
100
700
800
900
VREF = VCC
IN+ = GND
IN– = GND
SCK = NC
SDO = NC
CS = GND
FO = EXT OSC
TA = 25°C
VCC = 5V
VCC = 3V
TEMPERATURE (
°C)
–45
CONVERSION
CURRENT
(
A)
200
210
220
75
2412 G37
190
180
160
–15
15
45
–30
90
0
30
60
170
240
230
VCC = 5.5V
VCC = 2.7V
VCC = 3V
VCC = 5V
FO = GND
CS = GND
SCK = NC
SDO = NC
Conversion Current
vs Output Data Rate
Conversion Current
vs Temperature
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