ITH/RUN (Pin 2/Pin 1): Current Threshold/Run Input. This pin pe" />
參數(shù)資料
型號： DC859A
廠商： Linear Technology
文件頁數(shù)： 31/32頁
文件大小： 0K
描述： EVAL BOARD FOR LTC4267
設(shè)計資源： DC859A Design File
DC859A Schematic
標(biāo)準(zhǔn)包裝： 1
主要目的： 電源管理，以太網(wǎng)供電（POE）
嵌入式： 否
已用 IC / 零件： LTC4267
已供物品： 板
LTC4267
8
4267fc
ITH/RUN (Pin 2/Pin 1): Current Threshold/Run Input. This
pin performs two functions. It serves as the switching
regulator error amplier compensation point as well as
the run/shutdown control input. Nominal voltage range is
0.7V to 1.9V. Forcing the pin below 0.28V with respect to
PGND causes the controller to shut down.
PGND (Pin 1, 8, 9, 16/Pin 2, 15): Switching Regulator
Negative Supply. This pin is the negative supply rail for the
switching regulator controller and must be tied to POUT.
NGATE (Pin 3/Pin 3): Gate Driver Output. This pin drives
the regulator’s external N-Channel MOSFET and swings
from PGND to PVCC.
PVCC (Pin 4/Pin 4): Switching Regulator Positive Supply.
This pin is the positive supply rail for the switching regula-
tor and must be closely decoupled to PGND.
RCLASS(Pin5/Pin5):ClassSelectInput.Usedtosetthecur-
rent value the PD maintains during classication. Connect
a resistor between RCLASS and VPORTN (see Table 2).
VPORTN (Pin 7/Pin 7): Negative Power Input. Tie to the
–48V input port through the input diodes.
POUT (Pin 10/Pin 10): Power Output. Supplies –48V to
the switching regulator PGND pin and any additional PD
loads through an internal power MOSFET that limits input
current. POUT is high impedance until the voltage reaches
the turn-on UVLO threshold. The output is then current
limited. See the Application Information section.
PWRGD (Pin 11/Pin 11):Power Good Output, Open-Drain.
Indicates that the PD MOSFET is on and the switching
regulator can start operation. Low impedance indicates
power is good. PWRGD is high impedance during detec-
tion, classication and in the event of a thermal overload.
PWRGD is referenced to VPORTN.
SIGDISA (Pin 12/Pin 12):Signature Disable Input. SIGDISA
allows the PD to present an invalid signature resistance
and remain inactive. Connecting SIGDISA to VPORTP lowers
the signature resistance to an invalid value and disables
all functions of the LTC4267. If unused, tie SIGDISA to
VPORTN.
VPORTP (Pin 13/Pin 13): Positive Power Input. Tie to the
input port power return through the input diodes.
SENSE (Pin 14/Pin 14): Current Sense. This pin performs
two functions. It monitors the regulator switch current by
reading the voltage across an external sense resistor. It also
injects a current ramp that develops a slope compensation
voltage across an optional external programming resistor.
See the Applications Information section.
VFB (Pin 15/Pin 16): Feedback Input. Receives the feed-
back voltage from the external resistor divider across the
output.
NC (Pin 6/Pin 6, 8, 9): No Internal Connection.
Backside Connection (DHC Only, Pin 17): Exposed Pad.
This exposed pad must be soldered to an electrically isolated
and thermally conductive PC board heat sink.
(GN/DHC)
UU
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PI FU CTIO S
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