參數(shù)資料
型號(hào): DJLXT972MTEA4
廠商: Intel Corp.
英文描述: Single-Port 10/100 Mbps PHY Transceiver
中文描述: 單端口10/100 Mbps的物理層收發(fā)器
文件頁(yè)數(shù): 42/92頁(yè)
文件大?。?/td> 666K
代理商: DJLXT972MTEA4
Intel
LXT972M Single-Port 10/100 Mbps PHY Transceiver
42
Datasheet
Document Number: 302875-005
Revision Date: 27-Oct-2005
As shown in
Figure 12,
in 100BASE-TX mode, the LXT972M Transceiver scrambles and
transmits the data to the network using MLT-3 line code. MLT-3 signals received from the network
are de-scrambled, decoded, and sent across the MII to the MAC.
Figure 12. 100BASE-TX Data Path
S0
S1
S2
S3
S4
Parallel
to
Serial
Serial
to
Parallel
MLT3
0
+1
-1
0
0
Transition = 1.
No Transition = 0.
All transitions must follow
pattern: 0, +1, 0, -1, 0, +1...
Scrambler Bypass Data Flow
S0
S1
S2
S3
S4
Standard Data Flow
D0
D1
D2
D3
Parallel
to
Serial
Serial
to
Parallel
D0
D1
D2
D3
4B/5B
S0
S1
S2
S3
S4
MLT3
0
+1
-1
0
0
Transition = 1.
No Transition = 0.
All transitions must follow
pattern: 0, +1, 0, -1, 0, +1...
Scramble
De-
Scramble
B3467-01
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