參數(shù)資料
型號: DJLXT972MTEA4
廠商: Intel Corp.
英文描述: Single-Port 10/100 Mbps PHY Transceiver
中文描述: 單端口10/100 Mbps的物理層收發(fā)器
文件頁數(shù): 62/92頁
文件大?。?/td> 666K
代理商: DJLXT972MTEA4
Intel
LXT972M Single-Port 10/100 Mbps PHY Transceiver
62
Datasheet
Document Number: 302875-005
Revision Date: 27-Oct-2005
Table 23
lists digital I/O characteristics for all pins except the MII, XI/XO, and LED/CFG pins.
Table 24
lists digital I/O characteristics for the MII pins.
Table 23. Digital I/O Characteristics (Except for MII, XI/XO, and LED/CFG Pins)
Parameter
Sym
Min
Typ
2
Max
Units
Test Conditions
Input Low voltage
V
IL
0.8
V
Input High voltage
V
IH
2.0
V
Input current
I
I
-10
10
μ
A
0.0 < V
I
< V
CC
Output Low voltage
V
OL
0.4
V
I
OL
= 4 mA
Output High voltage
V
OH
2.4
V
I
OH
= -4 mA
1. Typical values are at 25 °C and are for design aid only, not guaranteed, and not subject to production
testing.
Table 24. Digital I/O Characteristics
1
- MII Pins
Parameter
Sym
Min
Typ
2
Max
Units
Test Conditions
Input Low voltage
V
IL
0.8
V
Input High voltage
V
IH
2.0
V
Input current
I
I
-10
10
μ
A
0.0 < V
I
< VCCIO
Output Low voltage
V
OL
0.4
V
I
OL
= 4 mA
Output High voltage
V
OH
2.2
V
I
OH
= -4 mA, VCCIO = 3.3 V
V
OH
2.0
V
I
OH
= -4 mA, VCCIO = 2.5 V
Driver output resistance
(Line driver output
enabled)
R
O
3
100
Ω
VCCIO = 2.5 V
R
O
3
100
Ω
VCCIO = 3.3 V
1. MII digital I/O pins are tolerant to 5 V inputs.
2. Typical values are at 25 °C and are for design aid only, not guaranteed, and not subject to production
testing.
3. Parameter is guaranteed by design and not subject to production testing.
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