- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄376727 > DK900 (意法半導(dǎo)體) DK900 Development Kit For PSD9xxF Family of Flash PSDs(用于PSD9XXF系列PSD的開發(fā)套件DK900) PDF資料下載
參數(shù)資料
| 型號： | DK900 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | DK900 Development Kit For PSD9xxF Family of Flash PSDs(用于PSD9XXF系列PSD的開發(fā)套件DK900) |
| 中文描述： | DK900開發(fā)套件PSD9xxF月臺幕門的閃存（用于PSD9XXF系列私營部門的開發(fā)套件DK900家庭） |
| 文件頁數(shù)： | 23/53頁 |
| 文件大?。?/td> | 1162K |
| 代理商： | DK900 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁當前第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁
22
Micro level
You might ask how can this happen without knowledge of the microcontroller You might be wondering how can this
all happen with the microcontroller running full speed It all happens due to the chip select decoding.
Here are the equations that control the memory map before, after and during the transition. For clarity well only
consider the segments of interest for this application which are fs0 and CSBOOT0/1. Certainly the same techniques
apply with paging when using the remaining FLASH segments.
CSBOOT0 = ((address >= ^h0000) & (address <= ^h1FFF) & !swap )
# ((address >= ^hC000) & (address >= ^hDFFF ) & swap );
CSBOOT1 = ((address >= ^h2000) & (address <= ^h3FFF) & !swap )
# ((address >= ^hE000) & (address >= ^hFFFF ) & swap );
FS0 = ((address >= ^h8000) & (address <= ^hBFFF) & !swap)
# ((address >= ^h0000) & (address <= ^h3FFF) & swap );
The above equation tells us that fs0 can show up in either of two places; 0x0-0x3FFF or 0x8000-0xBFFF. The choice
of which location is used is based on the variable
swap,
a single bit in the PAGE register (msb). The swap bit is the
most significant bit of the PAGE register (csiop+0xE0). The PAGE register is 0 at power up. So, if swap=0 at power
up, then fs0 must appear at 8000-BFFF and CSBOOT0 is at 0-0x1fff and CSBOOT1 is at 0x2000-3FFF. Code executes
from CSBOOT0 and CSBOOT1. This is the original memory map presented in Figure 20.
8031 boots from here
0000
2000
FFFF
4000
E000
CSBOOT1,
8k
CSBOOT0,
8k
C000
8000
A000
8031 boots from here
Program
Memory
Data
Memory
FS0
swap = 0, VM = 0x12
0000
2000
FFFF
4000
E000
CSBOOT1,
8k
CSBOOT0,
8k
C000
8000
A000
Program
Memory
Data
Memory
FS0
swap = 1, VM = 0x0C
Figure 24 Segment positions with swap and VM values
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DKF110PFW1LPES | Solid-State Fingerprint Sensor |
| DKF110PFW1LPG | Solid-State Fingerprint Sensor |
| DKF110PFW1STES | Solid-State Fingerprint Sensor |
| DKF110PFW1STG | Solid-State Fingerprint Sensor |
| DKF110PFWLPES | Solid-State Fingerprint Sensor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DK900-110 | 功能描述:開發(fā)板和工具包 - 8051 PSD Develop for 8051 RoHS:否 制造商:Silicon Labs 產(chǎn)品:Development Kits 工具用于評估:C8051F960, Si7005 核心: 接口類型:USB 工作電源電壓: |
| DK900-220 | 功能描述:開發(fā)板和工具包 - 8051 PSD Develop for 8051 RoHS:否 制造商:Silicon Labs 產(chǎn)品:Development Kits 工具用于評估:C8051F960, Si7005 核心: 接口類型:USB 工作電源電壓: |
| DK900-HC11-110 | 功能描述:開發(fā)板和工具包 - 其他處理器 PSD Devlp for 68HC11 RoHS:否 制造商:Freescale Semiconductor 產(chǎn)品:Development Systems 工具用于評估:P3041 核心:e500mc 接口類型:I2C, SPI, USB 工作電源電壓: |
| DK900-HC11-220 | 功能描述:開發(fā)板和工具包 - 其他處理器 PSD Devlp for 68HC11 RoHS:否 制造商:Freescale Semiconductor 產(chǎn)品:Development Systems 工具用于評估:P3041 核心:e500mc 接口類型:I2C, SPI, USB 工作電源電壓: |
| DK9209 | 制造商:BRUSH 功能描述:FUSES CLASS RK5 TIME DELAY |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。