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參數(shù)資料
| 型號： | DM5806 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | DM5806 DATA MODULE DIGITAL I/O BOARD |
| 中文描述： | DM5806數(shù)據(jù)模塊數(shù)字I / O板 |
| 文件頁數(shù)： | 41/64頁 |
| 文件大?。?/td> | 270K |
| 代理商： | DM5806 |
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4-11
Interrupts
- What Is an Interrupt
An interrupt is an event that causes the processor in your computer to temporarily halt its current process and
execute another routine. Upon completion of the new routine, control is returned to the original routine at the point
where its execution was interrupted.
Interrupts are very handy for dealing with asynchronous events (events that occur at less than regular intervals).
Keyboard activity is a good example; your computer cannot predict when you might press a key and it would be a
waste of processor time for it to do nothing while waiting for a keystroke to occur. Thus, the interrupt scheme is
used and the processor proceeds with other tasks. Then, when a keystroke does occur, the keyboard ‘interrupts’ the
processor, and the processor gets the keyboard data, places it in memory, and then returns to what it was doing
before it was interrupted. Other common devices that use interrupts are modems, disk drives, and mice.
Your DM5806 board can interrupt the processor when one of the six interrupt sources is enabled. By using
these interrupts, you can write software that effectively deals with real world events.
- Interrupt Request Lines
To allow different peripheral devices to generate interrupts on the same computer, the PC bus has eight
different interrupt request (IRQ) lines. A transition from low to high on one of these lines generates an interrupt
request which is handled by the PC’s interrupt controller. The interrupt controller checks to see if interrupts are to
be acknowledged from that IRQ and, if another interrupt is already in progress, it decides if the new request should
supersede the one in progress or if it has to wait until the one in progress is done. This prioritizing allows an
interrupt to be interrupted if the second request has a higher priority. The priority level is based on the number of the
IRQ; IRQ0 has the highest priority, IRQ1 is second-highest, and so on through IRQ7, which has the lowest. Many of
the IRQs are used by the standard system resources. IRQ0 is used by the system timer, IRQ1 is used by the key-
board, IRQ3 by COM2, IRQ4 by COM1, and IRQ6 by the disk drives. Therefore, it is important for you to know
which IRQ lines are available in your system for use by the DM5806 board.
- 8259 Programmable Interrupt Controller
The chip responsible for handling interrupt requests in the PC is the 8259 Programmable Interrupt Controller.
To use interrupts, you will need to know how to read and set the 8259’s interrupt mask register (IMR) and how to
send the end-of-interrupt (EOI) command to the 8259.
- Interrupt Mask Register (IMR)
Each bit in the interrupt mask register (IMR) contains the mask status of an IRQ line; bit 0 is for IRQ0, bit 1 is
for IRQ1, and so on. If a bit is
set
(equal to 1), then the corresponding IRQ is masked and it will not generate an
interrupt. If a bit is
clear
(equal to 0), then the corresponding IRQ is unmasked and can generate interrupts. The
IMR is programmed through port 21H.
For all bits:
0 = IRQ unmasked (enabled)
1 = IRQ masked (disabled)
I/O Port 21H
- End-of-Interrupt (EOI) Command
After an interrupt service routine is complete, the 8259 interrupt controller must be notified. This is done by
writing the value 20H to I/O port 20H.
- What Exactly Happens When an Interrupt Occurs
Understanding the sequence of events when an interrupt is triggered is necessary to properly write software
interrupt handlers. When an interrupt request line is driven high by a peripheral device (such as the DM5806), the
IRQ7
IRQ6
IRQ5
IRQ4
IRQ3
IRQ2
IRQ1
IRQ0
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