參數(shù)資料
型號: DM74ALS652
廠商: Fairchild Semiconductor Corporation
英文描述: Octal 3-STATE Bus Transceiver and Register(八總線收發(fā)器和寄存器(三態(tài)輸出))
中文描述: 八路三態(tài)總線收發(fā)器和寄存器(八總線收發(fā)器和寄存器(三態(tài)輸出))
文件頁數(shù): 1/6頁
文件大小: 57K
代理商: DM74ALS652
2000 Fairchild Semiconductor Corporation
DS009174
www.fairchildsemi.com
October 1986
Revised March 2000
D
DM74ALS652
Octal 3-STATE Bus Transceiver and Register
General Description
This device incorporates an octal transceiver and an octal
D-type register configured to enable transmission of data
from bus to bus or internal register to bus.
This bus transceiver features totem-pole 3-STATE outputs
designed specifically for driving highly-capacitive or rela-
tively low-impedance loads. The high-impedance state and
increased high level logic drive provide this device with the
capability of being connected directly to and driving the bus
lines in a bus organized system without need for interface
or pull-up components. They are particularly attractive for
implementing buffer registers, I/O ports, bidirectional bus
drivers, and working registers.
The registers in the DM74ALS652 are edge-triggered D-
type flip-flops. On the positive transition of the clock (CAB
or CBA), the input data is stored into the appropriate regis-
ter. The CAB input controls the transfer of data into the A
register and the CBA input controls the B register.
The SAB and SBA control pins are provided to select
whether real-time data or stored data is transferred. A LOW
input level selects real-time data and a HIGH level selects
stored data. The select controls have a “make before
break” configuration to eliminate a glitch which would nor-
mally occur in a typical multiplexer during the transition
between stored and real-time data.
The enable (GAB and GBA) control pins provide four
modes of operation: real-time data transfer from bus A to
B, real-time data transfer from bus B to A, real-time bus A
and/or B data transfer to internal storage, or internal stored
data transfer to bus A and/or B.
Features
I
Switching specifications at 50 pF
I
Switching specifications guaranteed over full tempera-
ture and V
CC
range
I
Advanced oxide-isolated, ion-implanted Schottky TTL
process
I
3-STATE buffer-type outputs drive bus lines directly
I
Independent registers and enables for A and B buses
I
Multiplexed real-time and stored data
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Order Number
DM74ALS652WM
DM74ALS652NT
Package Number Package Description
M24B
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
N24C
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-100, 0.300 Wide
相關(guān)PDF資料
PDF描述
DM74ALS652NT 10-Bit Buffer/Driver With 3-State Outputs 24-SOIC -40 to 85
DM74ALS652WM Octal 3-STATE Bus Transceiver and Register
DM74ALS74A Dual D Positive-Edge-Triggered Flip-Flop with Preset and Clear(雙正邊緣觸發(fā)的D觸發(fā)器(帶預(yù)置和清除端))
DM74ALS74AN Dual D Positive-Edge-Triggered Flip-Flop with Preset and Clear
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DM74ALS652NT 制造商:Fairchild Semiconductor Corporation 功能描述:IC 74ALS TTL 74ALS652 DIP24 5V
DM74ALS652NT_Q 功能描述:總線收發(fā)器 Oct 3-STATE Tran Reg RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
DM74ALS652WM 功能描述:總線收發(fā)器 Oct 3-STATE Tran Reg RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
DM74ALS652WM_Q 功能描述:總線收發(fā)器 Oct 3-STATE Tran Reg RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel