參數(shù)資料
型號: DM74LS109AM
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 通用總線功能
英文描述: Dual Positive-Edge-Triggered J-K Flip-Flop with Preset, Clear, and Complementary Outputs
中文描述: LS SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16
封裝: 0.150 INCH, MS-012, SOIC-16
文件頁數(shù): 2/5頁
文件大?。?/td> 52K
代理商: DM74LS109AM
www.fairchildsemi.com
2
D
Absolute Maximum Ratings
(Note 2)
Note 2:
The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Recommended Operating Conditions
Note 3:
C
L
=
15 pF, R
L
=
2 k
, T
A
=
25
°
C and V
CC
=
5V.
Note 4:
C
L
=
50 pF, R
L
=
2 k
, T
A
=
25
°
C and V
CC
=
5V.
Note 5:
The symbol (
) indicates the rising edge of the clock pulse is used for reference.
Note 6:
T
A
=
25
°
C and V
CC
=
5V.
Supply Voltage
Input Voltage
Operating Free Air Temperature Range
Storage Temperature Range
7V
7V
0
°
C to
+
70
°
C
65
°
C to
+
150
°
C
Symbol
Parameter
Min
4.75
2
Nom
5
Max
5.25
Units
V
V
V
mA
mA
MHz
MHz
V
CC
V
IH
V
IL
I
OH
I
OL
f
CLK
f
CLK
t
W
Supply Voltage
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Current
LOW Level Output Current
Clock Frequency (Note 3)
Clock Frequency (Note 4)
Pulse Width
(Note 3)
0.8
0.4
8
25
20
0
0
Clock HIGH
Preset LOW
Clear LOW
Clock HIGH
Preset LOW
Clear LOW
Data HIGH
Data LOW
Data HIGH
Data LOW
18
15
15
25
20
20
30
20
35
25
0
0
ns
t
W
Pulse Width
(Note 4)
ns
t
SU
Setup Time
(Note 3)(Note 5)
Setup Time
(Note 5)(Note 4)
Hold Time (Note 6)
Free Air Operating Temperature
ns
t
SU
ns
t
H
T
A
ns
°
C
70
相關(guān)PDF資料
PDF描述
DM74LS109AN Dual Positive-Edge-Triggered J-K Flip-Flop with Preset, Clear, and Complementary Outputs
DM74LS109AMX J-K-Type Flip-Flop
DM74LS10M Triple 3-Input NAND Gate
DM74LS10 Triple 3-Input NAND Gate(三3輸入與非門)
DM74LS10N Triple 3-Input NAND Gate
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