參數(shù)資料
型號(hào)： DMA2286
廠商： MICRONAS SEMICONDUCTOR HOLDING AG
元件分類： 消費(fèi)家電
英文描述： DMA 2275, DMA 2286 C/D/D2-MAC Descrambler
中文描述： SPECIALTY CONSUMER CIRCUIT, PQCC68
封裝： PLASTIC, LCC-68
文件頁(yè)數(shù)： 4/48頁(yè)
文件大?。?/td> 217K
代理商： DMA2286
DMA 2275, DMA 2286
4
The DMA 2275 and DMA 2286 C/D/D2–MAC De-
scrambler
1. Introduction
1.1. General Information
The DMA 2275 is a digital real–time descrambling pro-
cessor for the D2–MAC/Packet system. Together with
the D2–MAC/Packet decoder chip DMA 2271, it can be
used to build up a D2–MAC/Packet conditional access
receiver.
The DMA 2286 is a digital real–time descrambling pro-
cessor for the C/D/D2–MAC/Packet system. Together
with the C/D/D2–MAC/Packet decoder chip DMA 2281,
it can be used to build up a C/D/D2–MAC/Packet condi-
tional access receiver.
The programmable VLSI circuits in CMOS technology
are housed in 68–pin packages and contain on a single
silicon chip the following functions:
DMA 2275 and DMA 2286
– descrambling of MAC video signal
– interpolation of MAC video signal (aspect ratio 16:9)
– descrambling of MAC data packets
– descrambling of VBI–teletext
– entitlement packet acquisition
– supplementary general purpose packet acquisition
– line 625 acquisition
– communication with external microprocessor via the
IM bus
DMA 2286 only
– one subframe sound processing C/D/D2–MAC
1.2. Environment
Figures 1–1 and 1–2 show how the descrambler chips
DMA 2275 and DMA 2286 can be implemented into a
MAC conditional access receiver together with other cir-
cuits of ITT’s DIGIT 2000 digital TV system. These re-
ceivers provide descrambling facility for one video ser-
vice and up to four audio or data services including
VBI–teletext. It is important to notice that the DMA 2275
or DMA 2286 do not include any decryption or security
functions. These functions will be carried out by one or
more conditional access subsystems (CASS) which
communicate with the descrambler chip via the central
control unit (CCU) and the IM bus.
D2MAC
Baseband
Signal
CASS
VCU 2133
A/D Part
MCU 2600
NVM 3060
DRAM
DMA 2271
VCU 2133
D/A Part
AMU 2481
R
G
B
S1
S4
Fig. 1–1:
Block diagram for a stand–alone D2–MAC
decoder
TPU 2735
DRAM
DMA 2275
DRAM
CCU 3000
CASS
VCU 2133
A/D Part
MCU 2600
NVM 3060
DRAM
DMA 2281
VCU 2133
D/A Part
AMU 2481
R
G
B
S1
TPU 2740
DRAM
DMA 2286
DRAM
CCU 3000
D/D2MAC
Baseband
Signal
DRAM
Fig. 1–2:
Block diagram for a stand–alone D/D2–
MAC decoder
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