參數(shù)資料
型號: DP83848HSQ/NOPB
廠商: National Semiconductor
文件頁數(shù): 49/82頁
文件大小: 0K
描述: IC TXRX ETHERNET PHYTER 40-LLP
產(chǎn)品培訓模塊: PHYTER® Family
標準包裝: 1
類型: 收發(fā)器
驅(qū)動器/接收器數(shù): 1/1
規(guī)程: 以太網(wǎng)
電源電壓: 3 V ~ 3.6 V
安裝類型: 表面貼裝
封裝/外殼: 40-WFQFN 裸露焊盤
供應商設(shè)備封裝: 40-LLP-EP(6x6)
包裝: 剪切帶 (CT)
配用: DP83848H-MAU-EK-ND - BOARD EVALUATION DP83848H
其它名稱: *DP83848HSQ/NOPB
DP83848HSQCT
www.national.com
52
D
P
83
84
8H
7.2.5 RMII and Bypass Register (RBR)
This register configures the RMII Mode of operation. When RMII mode is disabled, the RMII functionality is bypassed.
Table 25. RMII and Bypass Register (RBR), addresses 0x17
Bit
Bit Name
Default
Description
15:6
RESERVED
0, RO
RESERVED: Writes ignored, Read as 0.
5
RMII_MODE
Strap, RW
Reduced MII Mode:
0 = Standard MII Mode
1 = Reduced MII Mode
4
RMII_REV1_0
0, RW
Reduce MII Revision 1.0:
0 = (RMII revision 1.2) CRS_DV will toggle at the end of a packet
to indicate deassertion of CRS.
1 = (RMII revision 1.0) CRS_DV will remain asserted until final data
is transferred. CRS_DV will not toggle at the end of a packet.
3
RX_OVF_STS
0, RO
RX FIFO Over Flow Status:
0 = Normal
1 = Overflow detected
2
RX_UNF_STS
0,RO
RX FIFO Under Flow Status:
0 = Normal
1 = Underflow detected
1:0
ELAST_BUF[1:0]
1, RW
Receive Elasticity Buffer. This field controls the Receive Elastic-
ity Buffer which allows for frequency variation tolerance between
the 50MHz RMII clock and the recovered data. The following value
indicate the tolerance in bits for a single packet. The minimum set-
ting allows for standard Ethernet frame sizes at +/-50ppm accuracy
for both RMII and Receive clocks. For greater frequency tolerance
the packet lengths may be scaled (i.e. for +/-100ppm, the packet
lengths need to be divided by 2).
00 = 14 bit tolerance (up to 16800 byte packets)
01 = 2 bit tolerance (up to 2400 byte packets)
10 = 6 bit tolerance (up to 7200 byte packets)
11 = 10 bit tolerance (up to 12000 byte packets)
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