參數(shù)資料
型號(hào)： DP83848YB-EVK/NOPB
廠商： National Semiconductor
文件頁(yè)數(shù)： 32/86頁(yè)
文件大小： 0K
描述： EVAL BOARD PHYTER EXTREME TEMP
標(biāo)準(zhǔn)包裝： 1
主要目的： 接口，以太網(wǎng)
已用 IC / 零件： DP83848YB
已供物品： 板
37
www.national.com
DP
83
84
8
Y
B
6.0 Reset Operation
The DP83848YB includes an internal power-on reset
(POR) function and does not need to be explicitly reset for
normal operation after power up. If required during normal
operation, the device can be reset by a hardware or soft-
ware reset.
6.1 Hardware Reset
A hardware reset is accomplished by applying a low pulse
(TTL level), with a duration of at least 1
s, to the
RESET_N. This will reset the device such that all registers
will be reinitialized to default values and the hardware con-
figuration values will be re-latched into the device (similar
to the power-up/reset operation).
6.2 Software Reset
A software reset is accomplished by setting the reset bit
(bit 15) of the Basic Mode Control Register (BMCR). The
period from the point in time when the reset bit is set to the
point in time when software reset has concluded is approx-
imately 1
s.
The software reset will reset the device such that all regis-
ters will be reset to default values and the hardware config-
uration values will be maintained. Software driver code
must wait 3
s following a software reset before allowing
further serial MII operations with the DP83848YB.
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