- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄1912 > DP83848YB/NOPB (National Semiconductor)IC TXRX ETHERNET PHYTERA 48-LQFP PDF資料下載
參數(shù)資料
| 型號： | DP83848YB/NOPB |
| 廠商： | National Semiconductor |
| 文件頁數(shù)： | 14/86頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC TXRX ETHERNET PHYTERA 48-LQFP |
| 標準包裝： | 250 |
| 類型： | 收發(fā)器 |
| 驅(qū)動器/接收器數(shù)： | 1/1 |
| 規(guī)程： | 以太網(wǎng) |
| 電源電壓： | 3 V ~ 3.6 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-LQFP 裸露焊盤 |
| 供應商設備封裝： | 48-LQFP 裸露焊盤（7x7） |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | DP83848YBTR |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁當前第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁
www.national.com
20
D
P
838
48
YB
2.4.2 LED Direct Control
The DP83848YB provides another option to directly control
any or all LED outputs through the LED Direct Control Reg-
ister (LEDCR), address 18h. The register does not provide
read access to LEDs.
2.5 Half Duplex vs. Full Duplex
The DP83848YB supports both half and full duplex opera-
tion at both 10 Mb/s and 100 Mb/s speeds.
Half-duplex relies on the CSMA/CD protocol to handle colli-
sions and network access. In Half-Duplex mode, CRS
responds to both transmit and receive activity in order to
maintain compliance with the IEEE 802.3 specification.
Since the DP83848YB is designed to support simultaneous
transmit and receive activity it is capable of supporting full-
duplex switched applications with a throughput of up to 200
Mb/s per port when operating in 100BASE-TX mode.
Because the CSMA/CD protocol does not apply to full-
duplex operation, the DP83848YB disables its own internal
collision sensing and reporting functions and modifies the
behavior of Carrier Sense (CRS) such that it indicates only
receive activity. This allows a full-duplex capable MAC to
operate properly.
All modes of operation (100BASE-TX and 10BASE-T) can
run either half-duplex or full-duplex. Additionally, other than
CRS and Collision reporting, all remaining MII signaling
remains the same regardless of the selected duplex mode.
It is important to understand that while Auto-Negotiation
with the use of Fast Link Pulse code words can interpret
and configure to full-duplex operation, parallel detection
can not recognize the difference between full and half-
duplex from a fixed 10 Mb/s or 100 Mb/s link partner over
twisted pair. As specified in the 802.3u specification, if a
far-end link partner is configured to a forced full duplex
100BASE-TX ability, the parallel detection state machine in
the partner would be unable to detect the full duplex capa-
bility of the far-end link partner. This link segment would
negotiate to a half duplex 100BASE-TX configuration
(same scenario for 10 Mb/s).
2.6 Internal Loopback
The DP83848YB includes a Loopback Test mode for facili-
tating system diagnostics. The Loopback mode is selected
through bit 14 (Loopback) of the Basic Mode Control Reg-
ister (BMCR). Writing 1 to this bit enables MII transmit data
to be routed to the MII receive outputs. Loopback status
may be checked in bit 3 of the PHY Status Register
(PHYSTS). While in Loopback mode the data will not be
transmitted onto the media. To ensure that the desired
operating mode is maintained, Auto-Negotiation should be
disabled before selecting the Loopback mode.
2.7 BIST
The DP83848YB incorporates an internal Built-in Self Test
(BIST) circuit to accommodate in-circuit testing or diagnos-
tics. The BIST circuit can be utilized to test the integrity of
the transmit and receive data paths. BIST testing can be
performed with the part in the internal loopback mode or
externally looped back using a loopback cable fixture.
The BIST is implemented with independent transmit and
receive paths, with the transmit block generating a continu-
ous stream of a pseudo random sequence. The user can
select a 9 bit or 15 bit pseudo random sequence from the
PSR_15 bit in the PHY Control Register (PHYCR). The
received data is compared to the generated pseudo-ran-
dom data by the BIST Linear Feedback Shift Register
(LFSR) to determine the BIST pass/fail status.
The pass/fail status of the BIST is stored in the BIST status
bit in the PHYCR register. The status bit defaults to 0 (BIST
fail) and will transition on a successful comparison. If an
error (mis-compare) occurs, the status bit is latched and is
cleared upon a subsequent write to the Start/Stop bit.
For transmit VOD testing, the Packet BIST Continuous
Mode can be used to allow continuous data transmission,
setting BIST_CONT_MODE, bit 5, of CDCTRL1 (0x1Bh).
The number of BIST errors can be monitored through the
BIST Error Count in the CDCTRL1 (0x1Bh), bits [15:8].
相關PDF資料 |
PDF描述 |
|---|---|
| DRM4000-N00-232 | DRM 4000 MODULE |
| DRM4000L-N00-232 | MODULE DEAD RECKONING RS-232 |
| DS100BR111SQE/NOPB | IC REPEATER 10.3GBPS 2CH 24LLP |
| DS10BR254TSQX/NOPB | IC LVDS REPEAT 1.5GBPS 1:4 40LLP |
| DS1210SN/T&R | IC CONTROLLER CHIP NV IND 16SOIC |
相關代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DP83848YBX/NOPB | 功能描述:以太網(wǎng) IC RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| DP83849C | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:PHYTER? DUAL Commercial Temperature Dual Port 10/100 Mb/s Ethernet Physical Layer Transceiver |
| DP83849C_08 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:PHYTER? DUAL Commercial Temperature Dual Port 10/100 Mb/s Ethernet Physical Layer Transceiver |
| DP83849CVS | 功能描述:以太網(wǎng) IC RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| DP83849CVS | 制造商:Texas Instruments 功能描述:TRANSCEIVER, ENET PHYTER, DUAL, 80TQFP 制造商:Texas Instruments 功能描述:TRANSCEIVER, ENET PHYTER, DUAL, 80TQFP; Data Rate:100Mbps; Ethernet Type:IEEE 802.3u; Supply Voltage Min:3V; Supply Voltage Max:3.6V; Digital IC Case Style:TQFP; No. of Pins:80; Interface Type:MII, RMII, Serial; Operating Temperature;RoHS Compliant: Yes |
發(fā)布緊急采購，3分鐘左右您將得到回復。