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參數資料
| 型號： | DP83848YBX/NOPB |
| 廠商： | National Semiconductor |
| 文件頁數： | 2/86頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC TXRX ETHERNET PHYTERA 48-LQFP |
| 產品培訓模塊： | PHYTER® Family |
| 標準包裝： | 1,000 |
| 類型： | 收發(fā)器 |
| 驅動器/接收器數： | 1/1 |
| 規(guī)程： | 以太網 |
| 電源電壓： | 3 V ~ 3.6 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-LQFP 裸露焊盤 |
| 供應商設備封裝： | 48-LQFP 裸露焊盤（7x7） |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | DP83848YBX |
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DP
83
84
8
Y
B
1.0 Pin Descriptions
The DP83848YB pins are classified into the following inter-
face categories (each interface is described in the sections
that follow):
— Serial Management Interface
— MAC Data Interface
— Clock Interface
— LED Interface
—JTAG Interface
— Reset and Power Down
— Strap Options
— 10/100 Mb/s PMD Interface
— Special Connect Pins
— Power and Ground pins
Note: Strapping pin option. Please see Section 1.7 for strap
definitions.
All DP83848YB signal pins are I/O cells regardless of the
particular use. The definitions below define the functionality
of the I/O cells for each pin.
1.1 Serial Management Interface
1.2 MAC Data Interface
Type: I
Input
Type: O
Output
Type: I/O
Input/Output
Type OD
Open Drain
Type: PD,PU Internal Pulldown/Pullup
Type: S
Strapping Pin (All strap pins have weak in-
ternal pull-ups or pull-downs. If the default
strap value is needed to be changed then an
external 2.2 k
resistor should be used.
Please see Section 1.7 for details.)
Signal Name
Type
Pin #
Description
MDC
I
31
MANAGEMENT DATA CLOCK: Synchronous clock to the MDIO
management data input/output serial interface which may be
asynchronous to transmit and receive clocks. The maximum clock
rate is 25 MHz with no minimum clock rate.
MDIO
I/O
30
MANAGEMENT DATA I/O: Bi-directional management instruc-
tion/data signal that may be sourced by the station management
entity or the PHY. This pin requires a 1.5 k
pullup resistor.
Signal Name
Type
Pin #
Description
TX_CLK
O
1
MII TRANSMIT CLOCK: 25 MHz Transmit clock output in 100
Mb/s mode or 2.5 MHz in 10 Mb/s mode derived from the 25 MHz
reference clock.
Unused in RMII mode. The device uses the X1 reference clock in-
put as the 50 MHz reference for both transmit and receive.
SNI TRANSMIT CLOCK: 10 MHz Transmit clock output in 10 Mb
SNI mode. The MAC should source TX_EN and TXD_0 using this
clock.
TX_EN
I, PD
2
MII TRANSMIT ENABLE: Active high input indicates the pres-
ence of valid data inputs on TXD[3:0].
RMII TRANSMIT ENABLE: Active high input indicates the pres-
ence of valid data on TXD[1:0].
SNI TRANSMIT ENABLE: Active high input indicates the pres-
ence of valid data on TXD_0.
TXD_0
TXD_1
TXD_2
TXD_3
I
S, I, PD
3
4
5
6
MII TRANSMIT DATA: Transmit data MII input pins, TXD[3:0],
that accept data synchronous to the TX_CLK (2.5 MHz in 10 Mb/s
mode or 25 MHz in 100 Mb/s mode).
RMII TRANSMIT DATA: Transmit data RMII input pins, TXD[1:0],
that accept data synchronous to the 50 MHz reference clock.
SNI TRANSMIT DATA: Transmit data SNI input pin, TXD_0, that
accept data synchronous to the TX_CLK (10 MHz in 10 Mb/s SNI
mode).
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相關代理商/技術參數 |
參數描述 |
|---|---|
| DP83849C | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:PHYTER? DUAL Commercial Temperature Dual Port 10/100 Mb/s Ethernet Physical Layer Transceiver |
| DP83849C_08 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:PHYTER? DUAL Commercial Temperature Dual Port 10/100 Mb/s Ethernet Physical Layer Transceiver |
| DP83849CVS | 功能描述:以太網 IC RoHS:否 制造商:Micrel 產品:Ethernet Switches 收發(fā)器數量:2 數據速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| DP83849CVS | 制造商:Texas Instruments 功能描述:TRANSCEIVER, ENET PHYTER, DUAL, 80TQFP 制造商:Texas Instruments 功能描述:TRANSCEIVER, ENET PHYTER, DUAL, 80TQFP; Data Rate:100Mbps; Ethernet Type:IEEE 802.3u; Supply Voltage Min:3V; Supply Voltage Max:3.6V; Digital IC Case Style:TQFP; No. of Pins:80; Interface Type:MII, RMII, Serial; Operating Temperature;RoHS Compliant: Yes |
| DP83849CVS/NOPB | 功能描述:以太網 IC RoHS:否 制造商:Micrel 產品:Ethernet Switches 收發(fā)器數量:2 數據速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
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