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參數(shù)資料
| 型號(hào)： | DP83848YBX/NOPB |
| 廠商： | National Semiconductor |
| 文件頁(yè)數(shù)： | 47/86頁(yè) |
| 文件大小： | 0K |
| 描述： | IC TXRX ETHERNET PHYTERA 48-LQFP |
| 產(chǎn)品培訓(xùn)模塊： | PHYTER® Family |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 類(lèi)型： | 收發(fā)器 |
| 驅(qū)動(dòng)器/接收器數(shù)： | 1/1 |
| 規(guī)程： | 以太網(wǎng) |
| 電源電壓： | 3 V ~ 3.6 V |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 48-LQFP 裸露焊盤(pán) |
| 供應(yīng)商設(shè)備封裝： | 48-LQFP 裸露焊盤(pán)（7x7） |
| 包裝： | 帶卷 (TR) |
| 其它名稱(chēng)： | DP83848YBX |
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7.2 Extended Registers
7.2.1 PHY Status Register (PHYSTS)
This register provides a single location within the register set for quick access to commonly accessed information.
Table 21. PHY Status Register (PHYSTS), address 0x10
Bit
Bit Name
Default
Description
15
RESERVED
0, RO
RESERVED: Write ignored, read as 0.
14
MDI-X mode
0, RO
MDI-X mode as reported by the Auto-Negotiation logic:
This bit will be affected by the settings of the MDIX_EN and
FORCE_MDIX bits in the PHYCR register. When MDIX is en-
abled, but not forced, this bit will update dynamically as the
Auto-MDIX algorithm swaps between MDI and MDI-X configu-
rations.
1 = MDI pairs swapped
(Receive on TPTD pair, Transmit on TPRD pair)
0 = MDI pairs normal
(Receive on TRD pair, Transmit on TPTD pair)
13
Receive Error Latch
0, RO/LH
Receive Error Latch:
This bit will be cleared upon a read of the RECR register.
1 = Receive error event has occurred since last read of RXERCNT
(address 0x15, Page 0).
0 = No receive error event has occurred.
12
Polarity Status
0, RO
Polarity Status:
This bit is a duplication of bit 4 in the 10BTSCR register. This bit will
be cleared upon a read of the 10BTSCR register, but not upon a
read of the PHYSTS register.
1 = Inverted Polarity detected.
0 = Correct Polarity detected.
11
False Carrier Sense
Latch
0, RO/LH
False Carrier Sense Latch:
This bit will be cleared upon a read of the FCSR register.
1 = False Carrier event has occurred since last read of FCSCR (ad-
dress 0x14).
0 = No False Carrier event has occurred.
10
Signal Detect
0, RO/LL
100Base-TX unconditional Signal Detect from PMD.
9
Descrambler Lock
0, RO/LL
100Base-TX Descrambler Lock from PMD.
8
Page Received
0, RO
Link Code Word Page Received:
This is a duplicate of the Page Received bit in the ANER register,
but this bit will not be cleared upon a read of the PHYSTS register.
1 = A new Link Code Word Page has been received. Cleared on
read of the ANER (address 0x06, bit 1).
0 = Link Code Word Page has not been received.
7
MII Interrupt
0, RO
MII Interrupt Pending:
1 = Indicates that an internal interrupt is pending. Interrupt source
can be determined by reading the MISR Register (0x12h). Reading
the MISR will clear the Interrupt.
0= No interrupt pending.
6
Remote Fault
0, RO
Remote Fault:
1 = Remote Fault condition detected (cleared on read of BMSR (ad-
dress 01h) register or by reset). Fault criteria: notification from Link
Partner of Remote Fault via Auto-Negotiation.
0 = No remote fault condition detected.
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| DP83849C | 制造商:NSC 制造商全稱(chēng):National Semiconductor 功能描述:PHYTER? DUAL Commercial Temperature Dual Port 10/100 Mb/s Ethernet Physical Layer Transceiver |
| DP83849C_08 | 制造商:NSC 制造商全稱(chēng):National Semiconductor 功能描述:PHYTER? DUAL Commercial Temperature Dual Port 10/100 Mb/s Ethernet Physical Layer Transceiver |
| DP83849CVS | 功能描述:以太網(wǎng) IC RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| DP83849CVS | 制造商:Texas Instruments 功能描述:TRANSCEIVER, ENET PHYTER, DUAL, 80TQFP 制造商:Texas Instruments 功能描述:TRANSCEIVER, ENET PHYTER, DUAL, 80TQFP; Data Rate:100Mbps; Ethernet Type:IEEE 802.3u; Supply Voltage Min:3V; Supply Voltage Max:3.6V; Digital IC Case Style:TQFP; No. of Pins:80; Interface Type:MII, RMII, Serial; Operating Temperature;RoHS Compliant: Yes |
| DP83849CVS/NOPB | 功能描述:以太網(wǎng) IC RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
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