參數(shù)資料
型號： DP83848YBX/NOPB
廠商： National Semiconductor
文件頁數(shù)： 52/86頁
文件大?。?/td> 0K
描述： IC TXRX ETHERNET PHYTERA 48-LQFP
產(chǎn)品培訓(xùn)模塊： PHYTER® Family
標(biāo)準(zhǔn)包裝： 1,000
類型： 收發(fā)器
驅(qū)動器/接收器數(shù)： 1/1
規(guī)程： 以太網(wǎng)
電源電壓： 3 V ~ 3.6 V
安裝類型： 表面貼裝
封裝/外殼： 48-LQFP 裸露焊盤
供應(yīng)商設(shè)備封裝： 48-LQFP 裸露焊盤（7x7）
包裝： 帶卷 (TR)
其它名稱： DP83848YBX
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7.2.6 100 Mb/s PCS Configuration and Status Register (PCSR)
Table 26. 100 Mb/s PCS Configuration and Status Register (PCSR), address 0x16
Bit
Bit Name
Default
Description
15:13
RESERVED
<00>, RO
RESERVED: Writes ignored, Read as 0.
12
RESERVED
0
RESERVED:
Must be zero.
11
RESERVED
0
RESERVED:
Must be zero.
10
TQ_EN
0, RW
100Mbs True Quiet Mode Enable:
1 = Transmit True Quiet Mode.
0 = Normal Transmit Mode.
9
SD FORCE PMA
0,RW
Signal Detect Force PMA:
1 = Forces Signal Detection in PMA.
0 = Normal SD operation.
8
SD_OPTION
1, RW
Signal Detect Option:
1 = Enhanced signal detect algorithm.
0 = Reduced signal detect algorithm.
7
DESC_TIME
0, RW
Descrambler Timeout:
Increase the descrambler timeout. When set this should allow the
device to receive larger packets (>9k bytes) without loss of syn-
chronization.
1 = 2ms
0 = 722us (per ANSI X3.263: 1995 (TP-PMD) 7.2.3.3e)
6
RESERVED
0
RESERVED:
Must be zero.
5
FORCE_100_OK
0, RW
Force 100Mb/s Good Link:
1 = Forces 100Mb/s Good Link.
0 = Normal 100Mb/s operation.
4
RESERVED
0
RESERVED:
Must be zero.
3
RESERVED
0
RESERVED:
Must be zero.
2
NRZI_BYPASS
0, RW
NRZI Bypass Enable:
1 = NRZI Bypass Enabled.
0 = NRZI Bypass Disabled.
1
RESERVED
0
RESERVED:
Must be zero.
0
RESERVED
0
RESERVED:
Must be zero.
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