參數(shù)資料
型號(hào): DP8441VLJ
英文描述: DRAM Controller
中文描述: DRAM控制器
文件頁(yè)數(shù): 21/46頁(yè)
文件大?。?/td> 644K
代理商: DP8441VLJ
6.0 Refresh Modes
(Continued)
6.2 EXTERNALLY CONTROLLED REFRESH
The user can perform externally controlled refreshes by as-
serting the DISRFSH and RFSH input signals. When these
inputs assert, the DP8440/41 will perform a refresh as soon
as possible. If the user keeps RFSH asserted with DISRFSH
already asserted, the DRAM controller will burst refresh the
memory for as long as the inputs are valid. The controller
will guarantee the RAS low and RAS precharge times for
every refresh. The user can choose to monitor the output
RFRQ to externally request a refresh. When RFRQ asserts,
it indicates that the refresh counter has expired.
TL/F/11718–11
FIGURE 15. Externally Controlled Refresh (2T of RAS Low and Precharge)
21
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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DP8441VLJ-40 制造商:NSC 制造商全稱:National Semiconductor 功能描述:microCMOS Programmable 16/64 Mbit Dynamic RAM Controller/Driver
DP84422BJ 制造商:Texas Instruments 功能描述:
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DP84422J 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DRAM Controller