參數(shù)資料
型號(hào): DS1884AT+T
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 18/92頁(yè)
文件大小: 0K
描述: IC SFP PON ONU CTRLR 24TQFN
標(biāo)準(zhǔn)包裝: 2,500
系列: *
DS1884
SFP and PON ONU Controller
with Digital LDD Interface
25
Maxim Integrated
The delta-sigma output uses pulse-density modulation.
It provides much lower output ripple than a standard
digital PWM output given the same clock rate and filter
components. An RC filter is required on the DAC output
as suggested in Figure 8. The external RC filter compo-
nents are chosen based on ripple requirements, output
load, delta sigma frequency, and desired response time.
Before tINIT, the DAC output is high impedance.
The reference input, REFIN, is the supply voltage for the
DAC’s output buffer. The voltage source connected to
REFIN must be able to support the edge rate require-
ments of the delta sigma outputs. In a typical application,
a 0.1uF capacitor should be connected between REFIN
and ground.
The DS1884’s delta-sigma output is 9 bits. For illustrative
purposes, a 3-bit example is provided in Figure 9.
Figure 9. Delta-Sigma Output
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