參數(shù)資料
型號: DS21354LC1+
廠商: Maxim Integrated Products
文件頁數(shù): 101/124頁
文件大?。?/td> 0K
描述: IC TXRX E1 3.3V 100-LQFP
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 90
功能: 單芯片收發(fā)器
接口: E1,HDLC
電路數(shù): 1
電源電壓: 3.14 V ~ 3.47 V
電流 - 電源: 75mA
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 100-LQFP
供應(yīng)商設(shè)備封裝: 100-LQFP(14x14)
包裝: 托盤
包括: 遠程和 AIS 警報檢測器 / 發(fā)生器
產(chǎn)品目錄頁面: 1430 (CN2011-ZH PDF)
DS21354/DS21554 3.3V/5V E1 Single-Chip Transceivers
78 of 124
RDC1: RECEIVE HDLC DS0 CONTROL REGISTER 1 (Address = B8 Hex)
(MSB)
(LSB)
RHS
RSaDS
RDS0M
RD4
RD3
RD2
RD1
RD0
SYMBOL
POSITION
NAME AND DESCRIPTION
RHS
RDC1.7
Receive HDLC source
0 = Sa bits defined by RCR2.3 to RCR2.7.
1 = Sa bits or DS0 channels defined by RDC1 (see bits defined below).
RSaDS
RDC1.6
Receive Sa Bit/DS0 Select.
0 = route Sa bits to the HDLC controller. RD0 to RD4 defines which Sa
bits are to be routed. RD4 corresponds to Sa4, RD3 to Sa5, RD2 to Sa6,
RD1 to Sa7 and RD0 to Sa8.
1 = route DS0 channels into the HDLC controller. RDC1.5 is used to
determine how the DS0 channels are selected.
RDS0M
RDC1.5
DS0 Selection Mode.
0 = utilize the RD0 to RD4 bits to select which single DS0 channel to use.
1 = utilize the RCHBLK control registers to select which DS0 channels to
use.
RD4
RDC1.4
DS0 Channel Select Bit 4. MSB of the DS0 channel select.
RD3
RDC1.3
DS0 Channel Select Bit 3.
RD2
RDC1.2
DS0 Channel Select Bit 2.
RD1
RDC1.1
DS0 Channel Select Bit 1.
RD0
RDC1.0
DS0 Channel Select Bit 0. LSB of the DS0 channel select.
RDC2: RECEIVE HDLC DS0 CONTROL REGISTER 2 (Address = B9 Hex)
(MSB)
(LSB)
RDB8
RDB7
RDB6
RDB5
RDB4
RDB3
RDB2
RDB1
SYMBOL
POSITION
NAME AND DESCRIPTION
RDB8
RDC2.7
DS0 Bit 8 Suppress Enable. MSB of the DS0. Set to one to stop this bit
from being used.
RDB7
RDC2.6
DS0 Bit 7 Suppress Enable. Set to one to stop this bit from being used.
RDB6
RDC2.5
DS0 Bit 6 Suppress Enable. Set to one to stop this bit from being used.
RDB5
RDC2.4
DS0 Bit 5 Suppress Enable. Set to one to stop this bit from being used.
RDB4
RDC2.3
DS0 Bit 4 Suppress Enable. Set to one to stop this bit from being used.
RDB3
RDC2.2
DS0 Bit 3 Suppress Enable. Set to one to stop this bit from being used.
RDB2
RDC2.1
DS0 Bit 2 Suppress Enable. Set to one to stop this bit from being used.
RDB1
RDC2.0
DS0 Bit 1 Suppress Enable. LSB of the DS0. Set to one to stop this bit
from being used.
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