參數(shù)資料
型號: DS21354LC1+
廠商: Maxim Integrated Products
文件頁數(shù): 66/124頁
文件大?。?/td> 0K
描述: IC TXRX E1 3.3V 100-LQFP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 90
功能: 單芯片收發(fā)器
接口: E1,HDLC
電路數(shù): 1
電源電壓: 3.14 V ~ 3.47 V
電流 - 電源: 75mA
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 100-LQFP
供應(yīng)商設(shè)備封裝: 100-LQFP(14x14)
包裝: 托盤
包括: 遠(yuǎn)程和 AIS 警報檢測器 / 發(fā)生器
產(chǎn)品目錄頁面: 1430 (CN2011-ZH PDF)
DS21354/DS21554 3.3V/5V E1 Single-Chip Transceivers
46 of 124
Table 6-1. Alarm Criteria
ALARM
SET CRITERIA
CLEAR CRITERIA
ITU SPEC.
RSA1
(Receive Signaling All
Ones)
over 16 consecutive frames
(one full MF) time slot 16
contains less than three
zeros
over 16 consecutive frames
(one full MF) time slot 16
contains three or more
zeros
G.732
4.2
RSA0
(Receive Signaling All
Zeros)
over 16 consecutive frames
(one full MF) time slot 16
contains all zeros
over 16 consecutive frames
(one full MF) time slot 16
contains at least a single
one
G.732
5.2
RDMA
(Receive Distant
Multiframe Alarm)
bit 6 in time slot 16 of
frame 0 set to one for two
consecutive MF
bit 6 in time slot 16 of
frame 0 set to zero for two
consecutive MF
O.162
2.1.5
RUA1
(Receive Unframed All
Ones)
less than three zeros in two
frames (512–bits)
more than two zeros in two
frames (512 bits)
O.162
1.6.1.2
RRA
(Receive Remote Alarm)
bit 3 of non-align frame set
to one for three
consecutive occasions
bit 3 of non-align frame set
to zero for three
consecutive occasions
O.162
2.1.4
RCL
(Receive Carrier Loss)
255 (or 2048) consecutive
zeros received
in 255-bit times, at least 32
ones are received
G.775 / G.962
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