參數(shù)資料
型號： DS2143QN/T&R
廠商： Maxim Integrated Products
文件頁數(shù)： 10/44頁
文件大?。?/td> 0K
描述： IC CONTROLLER E1 5V LP 44-PLCC
產(chǎn)品培訓模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝： 500
控制器類型： E1 控制器
接口： 并行/串行
電源電壓： 4.5 V ~ 5.5 V
電流 - 電源： 10mA
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 44-LCC（J 形引線）
供應商設備封裝： 44-PLCC（16.59x16.59）
包裝： 帶卷 (TR)
DS2143/DS2143Q
18 of 44
ALARM CRITERIA Table 2
ALARM
SET CRITERIA
CLEAR CRITERIA
ITU
SPEC.
RSA1
(receive signaling
all 1s)
over 16 consecutive frames
(one full MF) timeslot 16
contains less than 3 0s
over 16 consecutive frames (one full
MF) timeslot 16 contains three or
more 0s
G.732
4.2
RSA0
(receive signaling
all 0s)
over 16 consecutive frames
(one full MF) timeslot 16
contains all 0s
over 16 consecutive frames (one full
MF) timeslot 16 contains at least a
single 1
G.732
5.2
RDMA
(receive distant
multiframe alarm)
bit 6 in timeslot 16 of frame 0
set to 1 for two consecutive
MFs
bit 6 in timeslot 16 of frame 0 set to
0 for two consecutive MFs
O.162
2.1.5
RUA1
(receive unframed
all 1s)
less than three 0s in two frames
(512 bits)
more than two 0s in two frames (512
bits)
O.162
1.6.1.2
RRA
(receive remote
alarm)
bit 3 of non-align frame set to 1
for three consecutive occasions
bit 3 of non-align frame set to 0 for
three consecutive occasions
O.162
2.1.4
RCL
(receive carrier
loss)
255 consecutive 0s received
in 255 bit times, at least 32 1s are
received
G.775
Note: all the alarm bits in Status Register 1 except the RUA1 will remain set after they are read if the
alarm condition still exists; the RUA1 will clear and check the next 512 bits for an all 1s condition at
which point it will again be set if the alarm condition still is present.
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