參數(shù)資料
型號(hào): DS21554LN
廠商: Maxim Integrated Products
文件頁數(shù): 54/124頁
文件大?。?/td> 0K
描述: IC TXRX E1 1-CHIP 5V 100-LQFP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
產(chǎn)品變化通告: Product Discontinuation 20/Feb/2012
標(biāo)準(zhǔn)包裝: 90
功能: 單芯片收發(fā)器
接口: E1,HDLC,J1,T1
電路數(shù): 1
電源電壓: 4.75 V ~ 5.25 V
電流 - 電源: 75mA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 100-LQFP
供應(yīng)商設(shè)備封裝: 100-LQFP(14x14)
包裝: 托盤
包括: 遠(yuǎn)程和 AIS 警報(bào)檢測器 / 發(fā)生器
DS21354/DS21554 3.3V/5V E1 Single-Chip Transceivers
35 of 124
TCR2: TRANSMIT CONTROL REGISTER 2 (Address = 13 Hex)
(MSB)
(LSB)
Sa8S
Sa7S
Sa6S
Sa5S
Sa4S
ODM
AEBE
PF
SYMBOL
POSITION
NAME AND DESCRIPTION
Sa8S
TCR2.7
Sa8 Bit Select. Set to one to source the Sa8 bit from the TLINK pin; set
to zero to not source the Sa8 bit. See Section 18.2 for timing details.
Sa7S
TCR2.6
Sa7 Bit Select. Set to one to source the Sa7 bit from the TLINK pin; set
to zero to not source the Sa7 bit. See Section 18.2 for timing details.
Sa6S
TCR2.5
Sa6 Bit Select. Set to one to source the Sa6 bit from the TLINK pin; set
to zero to not source the Sa6 bit. See Section 18.2 for timing details.
Sa5S
TCR2.4
Sa5 Bit Select. Set to one to source the Sa5 bit from the TLINK pin; set
to zero to not source the Sa5 bit. See Section 18.2 for timing details.
Sa4S
TCR2.3
Sa4 Bit Select. Set to one to source the Sa4 bit from the TLINK pin; set
to zero to not source the Sa4 bit. See Section 18.2 for timing details.
ODM
TCR2.2
Output Data Mode.
0 = pulses at TPOSO and TNEGO are one full TCLKO period wide
1 = pulses at TPOSO and TNEGO are 1/2 TCLKO period wide
AEBE
TCR2.1
Automatic E–Bit Enable.
0 = E–bits not automatically set in the transmit direction
1 = E–bits automatically set in the transmit direction
PF
TCR2.0
Function of RLOS/LOTC Pin.
0 = Receive Loss of Sync (RLOS)
1 = Loss of Transmit Clock (LOTC)
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